Part 2 - Memory Flashcards

1
Q

What does SIMM stand for?

A

Single Inline Memory Module

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2
Q

What is SDRAM?

A

SDRAM is synchronous dynamic random access memory. It is available on a dual inline memory module (DIMM). It is synchronous—tied to the system clock, just like the CPU and MCC, so the MCC knows when data is ready to be grabbed from SDRAM. This results in little wasted time.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 139). McGraw-Hill Education. Kindle Edition.

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3
Q

What is DDR SDRAM and how many pins does it use?

A

Double Data Rate SDRAM, DDR SDRAM basically copied Rambus, doubling the throughput of SDRAM by making two processes for every clock cycle. Comes in 184-pin for desktops and 200-pin SO-DIMMs or 172-pin micro-DIMMs for laptops.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 142). McGraw-Hill Education. Kindle Edition.

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4
Q

What is the difference between DDRxxx and PC-xxxx for DDR SDRAM speeds?

A

DDRxxx is the speed of individual chips on a SDRAM DDR module.

PC-xxxx is the speed of the whole module.

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5
Q

What is dual channel architecture?

A

Using two sticks of RAM together to increase throughput. Manufacturers have released motherboards with MCCs that support dual-channel architecture using DDR SDRAM.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 143). McGraw-Hill Education. Kindle Edition.

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6
Q

What improvements were made in DDR2 SDRAM?

What is the pin count for DIMM and SO-DIMM modules, the channel architecture supported, prefetch buffer size, and I/O speed increase?

A

DDR2 is twice as fast as DDR, has a maximum transfer rate of 800 MT/s.

240-pin DIMM module
200-pin SO-DIMM module

Supports single-channel and dual-channel architecture.

Prefetch buffer of 4 bits
I/O speed x2 (double)

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7
Q

What improvements were made in DDR3 SDRAM?

What is the pin count for DIMM and SO-DIMM modules, the channel architecture supported, prefetch buffer size, and I/O speed increase?

A

Higher speeds, more efficient architecture, and around 30 percent lower power consumption than DDR2 RAM.

240-pin DIMM module
204-pin SO-DIMM module

Supports dual-, triple-, and quad-channel architecture.

Prefetch buffer of 8 bits
I/O speed x4 (quadruple)

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8
Q

What improvements were made in DDR4 SDRAM?

What is the pin count for DIMM and SO-DIMM modules, prefetch buffer size, and I/O speed increase?

A

DDR4 offers higher density and lower voltages than DDR3, and can handle faster data transfer rates.

288-pin DIMM module
260-pin SO-DIMM module

Supports dual-, triple-, and quad-channel architecture.

Prefetch buffer of 8 bits
I/O speed x4 (quadruple)

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9
Q

How is latency shown in shorthand for RAM?

A

The delay in RAM’s reponse time is called it’s latency. In shorthand it uses initials like CL17 or CL19 for the technical name: column array strobe (CAS) latency. Lower latency is FASTER.I

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10
Q

If you put an older stick of RAM in a new system and get a seemingly dead PC how might you fix the issue?

A

Some mobos allow you to adjust the RAM timings manually. If yours does so, try raising the latency to give the slower RAM time to respond.

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11
Q

What happens if you put a high-latency stick in a motherboard set up for a low-latency stick and vice-versa?

A

If you put a high-latency stick in a motherboard set up for a low-latency stick, you’ll get an unstable or completely dead PC.

A low-latency stick in a high-latency system should work fine, though it’s a waste of speed.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 149). McGraw-Hill Education. Kindle Edition.

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12
Q

What is Parity RAM and how does it work?

A

Parity RAM stores an extra bit of data (called the parity bit) that the MCC uses to verify whether the data is correct. It doesn’t always detect an error, and if an error is found it cannot correct.

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13
Q

What is the MCC?

A

Memory Controller Chip

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14
Q

What is ECC RAM and how does it work?

A

EEC RAM is error correction code RAM. ECC detects and corrects any time a single bit is flipped, on-the-fly. It can detect but not correct a double-bit error. The checking and fixing come at a price, however, as ECC RAM is always slower than non-ECC RAM. It is sold in 72-bit versions, the extra eight bits are used for parity data.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 149). McGraw-Hill Education. Kindle Edition.

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15
Q

What is virtual memory?

A

A portion of a computer’s hard drive or solid-state drive used as an extension of system RAM. A page file or swap file is saved to the drive when “real” RAM is running low. Windows removes running programs temporarily from RAM into the page file so other programs can load and run.

Meyers, Mike. CompTIA A+ Certification All-in-One Exam Guide, Tenth Edition (Exams 220-1001 & 220-1002) (p. 152). McGraw-Hill Education. Kindle Edition.

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16
Q

What is the SPD technology?

A

Serial presence detect is a chip on RAM sticks called a SPD chip. This chip stores all the information about the DRAM, including size, speed, ECC/non-ECC, registered, unregistered, and othe rmore technical information.

17
Q

System lockups and page faults can sometimes mean what?

A

These issues can sometimes indicate a problem with RAM.

18
Q

What is a NMI?

A

Non-maskable interrupt (NMI) is a interruption the CPU cannot ignore. This manifests as a propietary crash screen such as BSoD or pin wheel of death.