P3L2 Memory Management - Page Tables Flashcards

1
Q

Page tables are used to convert the ________ memory addresses into _________ memory addresses.

For each virtual address, an entry in the page table is used to determine the actual physical address associated with that virtual address.

To this end, the page table serves as a ______.

A

Page tables are used to convert the virtual memory addresses into physical memory addresses.

For each virtual address, an entry in the page table is used to determine the actual physical address associated with that virtual address.

To this end, the page table serves as a map.

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2
Q

True or False?

The sizes of the pages in virtual memory are identical to the sizes of the page frames in physical memory.

A

True

By keeping the size of these the same, the operating system does not need to manage the translation of every single virtual address within a page.

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3
Q

We only translate the _______________________ to the _______________________ in a page frame.

The rest of the memory address in the page map to the corresponding ________ in the page frame.

As a result, we can reduce the number of entries we have in the page table.

A

We only translate the first virtual address in a page to the first physical address in a page frame.

The rest of the memory address in the page map to the corresponding offsets in the page frame.

As a result, we can reduce the number of entries we have in the page table.

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4
Q

Only the first portion of the ____________ is used to index into the page table. We call this part of the address the ______________________

The rest of the of the virtual address is the offset.

The VPN is used as an _______ into the page table, which will produce the _______ _____ ______ (___) which is the first physical address of the frame in DRAM.

To complete the full translation, the ____ needs to be summed with the _________ specified in the latter portion of the virtual address to produce the actual physical address in DRAM

A

Only the first portion of the virtual address is used to index into the page table. We call this part of the address the virtual page number (VPN).

The rest of the of the virtual address is the offset.

The VPN is used as an index into the page table, which will produce the physical frame number (PFN), which is the first physical address of the frame in DRAM.

To complete the full translation, the PFN needs to be summed with the offset specified in the latter portion of the virtual address to produce the actual physical address in DRAM

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5
Q

The virtual memory is allocated when ________________________

The physical memory is only allocated when ___________________________. This is called ‘allocation on first _______‘. The reason for this is to make sure that physical memory is only allocated when it’s really _________.

A

The virtual memory is allocated when the programmer allocates memory.

The physical memory is only allocated when the process is trying to access it. This is called ‘allocation on first touch’. The reason for this is to make sure that physical memory is only allocated when it’s really needed.

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6
Q

What is ‘Allocation on First Touch’?

A

The first time initialized memory is accessed, the operating system will realize that there isn’t physical memory that corresponds to this range of virtual memory addresses, so it will take a free page of physical memory, and create a page table entry linking the two.

The physical memory is only allocated when the process is trying to access it.

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7
Q

True or False?

Processs may share page tables.

A

False

The operating system creates a page table for every single process in the system.

That means that whenever a context switch is performed, the operating system must swap in the page table associated with the new process.

Hardware assists with page table access by maintaining a register that points to the active page table. On x86 platforms, this register is the CR3 register.

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8
Q

True or False?

If a process hasn’t used some of its memory pages for a long time, it is possible that those pages will be swapped out of physical memory to disk.

A

True

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9
Q

If the physical memory for some non-accessed allocated memory is swapped out to disk, how does the OS know about it?

A

Page table entries also have a number of bits that give the memory management system some more information about the validity of the access. For instance, if the page is in memory and the mapping is valid, its valid bit will be 1. Otherwise, it will be 0.

If the MMU sees that this bit is 0 when an access is occurring, it will raise a fault and trap to the operating system.

The OS has to decide if the access should permitted, and if so, where the page is located and where it should be brought into DRAM.

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10
Q

Describe 2 main fields of virtual address

How do use those to get the physical address?

A
  1. One field is the VPN- virtual page number number. That’s an index into the page table (map)
  2. Another field is the offset - how many bytes from start of page. (virtual page and physical page are same size …)
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11
Q

Describe two main fields of the physical address.

How is it generated?

A

One field is the PFN- page frame number. That’s an index into the DRAM pages. We get it from the page table

Another field is the offset - how many bytes from start of page. That’s specified as part of the virtual address.

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12
Q

On the x86 platform, what stored in the ..

  1. CR2 register?
  2. CR3 register?
A
  1. faulting address Error code is generated from some of the flags in the page table entry and the faulting address is stored in the CR2 register.
  2. active page table. Page table per process, so CR3 points to active page table.
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13
Q

Describe some fields of the page table entry

A

PFN points into pages in DRAM

Then bits:

Valid bit - are contents of virtual memory present in physical memory?

Access bit - has the page been accessed? read from? written to?

R/W

D - dirty bit - has file been written to?

P - protection - is page allowed to read/written/executed?

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14
Q

The MMU uses the page table entry not just to perform the address translation, but also to rely on these bits to determine the ________ of the access. If the hardware determines that a physical memory access cannot be performed, it causes a ___________________.

If this happens, then the CPU will place an error code on the stack of the ______ , and it will generate a ______ into the OS kernel, which will in turn invoke the _____________________. This handler determines the action to take based on the ___________________ and the __________________.

A

The MMU uses the page table entry not just to perform the address translation, but also to rely on these bits to determine the validity of the access. If the hardware determines that a physical memory access cannot be performed, it causes a page fault.

If this happens, then the CPU will place an error code on the stack of the kernel, and it will generate a trap into the OS kernel, which will in turn invoke the page fault handler. This handler determines the action to take based on the error code and the faulting address.

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15
Q

On x86 platforms, the error code is generated from some of the _______ in the page table entry and the faulting address is stored in the ______________________

A

On x86 platforms, the error code is generated from some of the flags in the page table entry and the faulting address is stored in the CR2 register.

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