P2L4: Thread Design Considerations Flashcards
Name the conceptual data structures that are needed in the user and kernel space for a thread abstraction (should not be all in on process-level PCB). Not for SunOs.
- User thread structure (user-level thread ID, user-level stack pointer, user-level registry values)
- PCB with “hard”process state (virtual address mappings)
- PCB with “light”process state ( only relevant for a subset of user-level threads** that are currently scheduled on ONE kernel level thread - signal mask + syscall arguments)
- Struct for the Kernel level thread (point to hard process state PCB for virtual address mappings (shared) , own stack + own register values such as program counter)
- CPU struct
Why does a modern OS typically maintain the information about the execution context of processes and threads in the system in several data structures?
The datastrucuture for the PCB of a process are split up!
- Overhead: smaller memory footprint. Shared data can be referenced instead of copied.
- Scalability: Fat datastructure is large + needs to be copied for each thread (even though they share information) when created newly
- Performance: Context switch faster (less data to save and reload from memory. Not the virtual address space)
- Flexibility: To many parallel writers if only one datastructure
- makes locking inefficient
- User-level thread library only needs to update a smaller portion (not the whole PCB) via well-defined interface from user level
Name examples when Kernel and Userspace need to coordinate for thread management
- Kernel signals thread librarybefore blocking thread => ULT library can use system call to create additional kernel thread
- Kernel notify thread library that it removed one kernel level thread (e.g idling too much)
What is the difference between CPU/Thread Pinning and bound threads?
- Bound Thread -> One ULT is assigned to only one Kernel level thread (or LWP in solaris case)
- CPU / Thread Pinning -> Kernel Thread pinned to particular CPU (CPU sets cgroup controller)
What is a disadvantage of having both user and kernel threads
Lack of visibility between kernel and ULT library requires coordination via signals and special system class.
1:1 model helps here.
Name problems in multi-threaded OS’es that stem from the lack of visibility between kernel and user level threads.
- ULT library does not know when Kernel level thread blocks due to IO => might have more user-level threads to run concurrently (NEEDS IMPROVEMENT AS THE ULT knows that the UL thread code does some blocking stuff!)
- ULT library does not know when kernel decides to remove an idling thread
- Kernel preempts kernel thread that runs critical user-level thread => other user thread wait for mutex lock to clear => kernel unaware of mutex data structures)
Name examples when the ULT library scheduler in invoked/executed.
- ULTs yield (Scheduler in library needs to schedule another ULT to run on kernel thread)
- Timer set by ULT expire (time slice is up for ULT, need to preempt)
- ULT call library functions (lock, unlock, …)
- Blocked ULTS are runnable
- Coordination between kernel & ULT thread library (kernel sends signals)
What is a problem in thread management (user & kernel space interaction) specific to multicore CPUs?
Video 13.
CPU 1 needs to signal CPU2 to invoke the user level scheduler when a condition (such as released lock) in thread executing on CPU1 changed.
Why: might need to preempt UL thread currently executing on KLT and schedule another UL thread with higher priority.
What are adaptive mutexes for and when does it make sense to use them?
Adaptive mutex = spin lock.
Just burn CPU cycles to wait for mutex to be freed.
Makes sense when:
- Mutex will soon be released / short critical section (need to have idea of kind of critical section associated with mutex)
- Multiple CPUs/Cores where stuff can execute IN PARALLEL
Interrupt vs. Signal
- Interrupt generated by external component (hardware, timer, other CPU!)
- Signal triggered by CPU itself and software running on it
- Which interrupts exist depend on the HARDWARE vs. Signals are dependent on OS
- Interrupts always asynchronous vs either asynchronous or synchronous (process accesses memory it should not - send SIGSEGV right away)
- Interrupts are delivered to a CPU vs. Signals are delivered to A PROCESS
Similarities Interrupt & Signal
- Have uniqeue ID
- can both be masked (cool!)
- Have a handler routine
- Interrupt handlers set for entire system by OS
- Signal handlers set per process (by user code)
What are asynchronus signals and name two examples.
Asynchonous Signals => result from some action outside the process.
SIGALARM (timer expired)
SIGINT
SIGKILL (coming from other CPU)
What are synchronus signals and name two examples.
result from an operation ON the thread
- SIGFPE (divide by zero)
- SIGSEGV
Can a interrupt be masked and if yes, does the Kernel do that?
Yes it can be. Kernel / OS is not involved. Instead the Hardware interrupt route will not deliver interrupt to CPU.
What types/categories of signals exist?
Real time Signals (reliable)
- n raised signals cause n handler executions
One Shot (unreliable)
- n signals pending (masked by process) == 1 signal pending
- handler routine have to be reinstalled by handler itself