P2L4 Flashcards
UL Thread Data Structure
thread ID
UL registers
thread stack
PCB (for threaded process)
Virtual address mapping
Stack
Registers
setjmp and longjmp
useful for switching ULT contexts
Hard and Light Process State
Portions of PCB where hard does not change for individual threads and light is thread specific
hard process state
does not change from thread to thread (virtual address mappings)
light process state
specific to each thread (signal mask, sys call args)
Rationale for multiple PCB data structures
Scalability
overheads
performance
flexibility
Sun KLT Data Structures
Process
Lightweight Process
binding
associating ULT to a specific KLT
pinning
associating KLT with specific CPU
Adaptive Mutex
if critical section is short, spin (dont’ block)
for long critical sections default blocking behavior
death row
threads periodically destroyed by a reaper thread if not reused (performance gains)
interrupt
events generated externally by components other than the CPU
determined based on the physical platform
appear asynchronously
signal
events triggered by CPU and software running on it
determined based on the OS
synchronous or asynchronous
Interrupt handler table
Interrupts are defined by hardware
how they are handled is OS specific
Signal handler table
signal is OS defined
how it is handled is process specific
Default handler actions
terminate, ignore, terminate & core dump, stop or continue
Interrupt masks are per
CPU
Signal masks are per
execution context
Types of Signals
One shot
Real time signals
One-shot signal
n signals pending == 1 signal pending
Real-time signal
if n signals raised, handler is called n times
Interrupt as thread
if handler doesn’t lock, execute on interrupted thread’s stack
if handler locks, turn into real thread
Interrupts top half and bottom
top half -> fast, non-blocking
bottom -> arbitrary complexity
