Operating System Concepts

Question 1

What is an Operating System (OS)?

Answer 1

An OS is system software that manages computer hardware, software resources, and provides various services for computer programs.

Question 2

Describe User Mode and Kernel Mode.

Answer 2

User Mode and Kernel Mode are the two modes of operation of the CPU. User Mode is restricted and does not have access to hardware or memory, while Kernel Mode has full access to all hardware and all memory.

Question 3

Define Cache

Answer 3

A cache is a hardware or software component that stores data so that future requests for that data can be served faster.

Question 4

What is an Interrupt?

Answer 4

An interrupt is a signal to the processor indicating an event needing immediate attention.

Question 5

What is a System Call?

Answer 5

A system call is the programmatic way a computer program requests a service from the kernel of the operating system.

Question 6

Define a Process.

Answer 6

A process is a program in execution, with its own dedicated system resources.

Question 7

Define a Program.

Answer 7

A program is a sequence of instructions that tell a computer what tasks to perform.

Question 8

What is Address Space?

Answer 8

Address Space is a range of valid addresses in memory that a process or thread can use.

Question 9

What is Multiprogramming?

Answer 9

Multiprogramming is the rapid switching of the CPU between multiple processes in memory. Allows multiple programs to share a CPU and run in (pseudo) parallel on a single CPU. Increases efficiency as it keeps CPU busy all the time.

Question 10

Explain Process Creation.

Answer 10

Process creation is the act of creating a new process. This is typically done by a parent process, creating a child process.

System call in UNIX: fork()
Creates an exact clone of calling process
- Different address space
- Same memory image
- Same program counter, registers, open files

Question 11

Explain Process Termination.

Answer 11

Process termination occurs when a process completes its execution or is explicitly killed.

Typical conditions which terminate a process:
1. Normal exit (voluntary)
2. Error exit (voluntary)
3. Fatal error (involuntary)
4. Killed by another process (involuntary)

Question 12

What are the different Process States?

Answer 12

A process may be in one of three states:
1. Running: Using CPU
2. Ready: Runnable, but temporarily stopped
3. Blocked: unable to run until some external event happens

running -> blocked
running -> ready
ready -> running
blocked -> ready

Question 13

Define Threads.

Answer 13

Threads are the smallest sequence of programmed instructions that can be managed independently by the scheduler, which is a part of the operating system. Threads are lighter than processes, and share the same memory space, allowing them to communicate with each other more easily. This is useful in programming when you want a program to perform multiple tasks simultaneously.

Question 14

Compare Processes vs Threads.

Answer 14

Both are independent sequences of execution. The typical difference is that threads run in a shared memory space, while processes run in separate memory spaces.

Question 15

What is Multi-threading?

Answer 15

Multi-threading is the ability of a central processing unit (CPU) to provide multiple threads of execution concurrently.

Question 16

What is Interprocess Communication (IPC)?

Answer 16

IPC is a set of methods for the exchange of data among multiple threads in one or more processes.

Question 17

Define Race Conditions.

Answer 17

A race condition occurs when two or more threads can access shared data and they try to change it at the same time.

Question 18

What is a Critical Region?

Answer 18

A critical region is a piece of code in a process during which the process is accessing a shared resource, like a data structure, a peripheral device, or a network connection.

Question 19

Explain Mutual Exclusion.

Answer 19

Mutual Exclusion is a property of concurrency control, which is instituted for the purpose of preventing race conditions.

Question 20

What is Busy Waiting?

Answer 20

Busy waiting is a method where a process repeatedly checks to see if a condition is true, such as whether keyboard input or a lock is available.

Question 21

Define Blocking in OS.

Answer 21

Blocking is a state where a process is waiting for an event such as an I/O operation to complete.

Question 22

What is a Mutex?

Answer 22

Mutex is a program object that allows multiple program threads to share the same resource, but not simultaneously.

Question 23

Explain Deadlocks.

Answer 23

Deadlocks occur when two or more processes are unable to proceed because each is waiting for the other to release resources.

Question 24

What is a Process Scheduler?

Answer 24

The process scheduler is an OS component which selects from among the processes that are in the ready state, and allocates the CPU to them.

Question 25

Explain Preemption in OS.

Answer 25

Preemption is the ability of the operating system to interrupt and move a currently running process to the waiting state to allow another process to run.

Question 26

Define Context Switch.

Answer 26

Context Switching is the procedure that a computer’s CPU (central processing unit) follows to change from one task (or process) to another while ensuring that the tasks do not conflict.

Question 27

What are Scheduling Algorithms?

Answer 27

Scheduling Algorithms are methods to schedule processes in the OS based on criteria such as priority, shortest job first, round robin, etc.

Question 28

Explain Nonpreemptive Scheduling.

Answer 28

In nonpreemptive scheduling, once the CPU has been allocated to a process, the process keeps the CPU until it releases the CPU either by terminating or switching to the waiting state.

Question 29

Explain Nonpreemptive Scheduling.

Answer 29

In nonpreemptive scheduling, once the CPU has been allocated to a process, the process keeps the CPU until it releases the CPU either by terminating or switching to the waiting state.

Question 30

What is Preemptive Scheduling?

Answer 30

In preemptive scheduling, if a new process arrives with a higher priority, the scheduler could preempt the currently executing process, allocate the CPU to the higher priority process.

Question 31

What is Memory Management?

Answer 31

Memory Management is the process of controlling and coordinating computer memory, assigning portions called blocks to various running programs to optimize overall system performance.

Question 32

Explain Memory Abstraction.

Answer 32

Memory Abstraction allows programmers to not worry about the amount of memory available or what is currently stored in memory. It’s often implemented using layers and spaces.

Question 33

What is a Memory Management Unit (MMU)?

Answer 33

MMU is a computer hardware unit that handles all memory and caching operations associated with the processor.

Question 34

What is Virtual Memory?

Answer 34

Virtual Memory is a memory management capability of an operating system that uses hardware and software to allow a computer to compensate for physical memory shortages by temporarily transferring data from RAM to disk storage.

Question 35

What is Paging?

Answer 35

Paging is a storage mechanism used in OS to retrieve processes from secondary storage to the main memory as pages. The primary concept behind paging is to break each process into individual pages. Thus the primary memory would also be separated into frames.

Question 36

What does TLB stand for and its role?

Answer 36

TLB stands for Translation Lookaside Buffer. It is a memory cache that stores recent translations of virtual memory to physical addresses for faster retrieval.

Question 37

What is a Page Fault?

Answer 37

A page fault occurs when a program attempts to access data or code that is in its address space, but is not currently located in the system RAM.

Question 38

Explain a Page Replacement Algorithm.

Answer 38

Page Replacement Algorithms decide which memory pages to page out when a page of memory needs to be allocated. They are critical in determining the effectiveness of virtual memory systems.

Question 39

What is the focus of Security & Cryptography in operating systems?

Answer 39

It involves techniques for ensuring that data stored in a system cannot be read or compromised by any individuals without authorization.

Question 40

Define Encryption/Decryption.

Answer 40

Encryption is the process of translating plain text data into something that appears to be random and meaningless (ciphertext). Decryption is the process of converting ciphertext back to its original format.

Question 41

What is Symmetric Cryptography? Give examples.

Answer 41

Symmetric Cryptography is a type of encryption where a single key is used for encryption and decryption. Examples are AES (Advanced Encryption Standard) and DES (Data Encryption Standard).

Question 42

Define ECB and CBC in the context of cryptography.

Answer 42

EBC (Electronic Code Book) and CBC (Cipher Block Chaining) are modes of operation for a block cipher. In EBC, each block of plaintext is independently encrypted, while in CBC, each block is XORed with the previous ciphertext block before encryption.

Question 43

Explain Asymmetric Cryptography.

Answer 43

Asymmetric cryptography, also known as public key cryptography, uses different keys for encryption and decryption. An example is the RSA algorithm.

Question 44

What is Key Exchange?

Answer 44

Key exchange is a method in cryptography by which cryptographic keys are exchanged between two parties, allowing use of a cryptographic algorithm.

Question 45

What are Digital Signatures?

Answer 45

A digital signature is a mathematical scheme for verifying the authenticity of digital messages or documents.

Question 46

Define Cryptographic Hashing.

Answer 46

A cryptographic hash function is a special class of hash function that has certain properties which make it suitable for use in cryptography.

Question 47

What does Secure Communication entail?

Answer 47

Secure Communication involves encrypting the data that is sent between two systems to prevent potential eavesdropping.

Question 48

What is a Message Authentication Code (MAC)?

Answer 48

A MAC is a short piece of information used to authenticate a message and to provide integrity and authenticity assurances on the message.

Question 49

Explain the Diffie-Hellman Key Exchange.

Answer 49

The Diffie-Hellman Key Exchange is a method of securely exchanging cryptographic keys over a public channel, allowing two parties, each having a public-private key pair, to establish a shared secret over an insecure channel.

Question 50

What are Digital Certificates and Public Key?

Answer 50

A digital certificate is a digital form of identification, while a public key is a large numerical value that is used to encrypt data. The certificate associates the public key with an entity that holds the corresponding private key.

Question 51

What is Transport Layer Security (TLS)?

Answer 51

TLS is a cryptographic protocol designed to provide communications security over a computer network. It is used to secure web traffic, preventing tampering, eavesdropping and message forgery.

Question 52

Explain the Handshake Protocol in the context of networking.

Answer 52

The Handshake Protocol is part of the SSL/TLS protocol for initiating a secure connection. It allows the server and client to authenticate each other and to negotiate an encryption algorithm and cryptographic keys before data is exchanged.

Question 53

What is a Trap Instruction?

Answer 53

A trap instruction, also known as a software interrupt or an exception, is a mechanism used in computer architecture to transfer control from user mode to kernel mode. It is typically triggered by a software event or a specific instruction executed by a program.

Question 54

What is Starvation?

Answer 54

When low priority jobs will never execute, if more important jobs continually arrive

Question 55

Optimal Page Replacement Algorithm

Answer 55

The optimal page replacement algorithm, also known as Belady’s MIN algorithm, replaces the page that will not be used for the longest period of time in the future. It is the most efficient algorithm but is difficult to implement in practice because it requires future knowledge of the reference string.

Question 56

Not Recently Used (NRU) Algorithm

Answer 56

The NRU algorithm classifies pages into four categories based on the reference and modified bits and removes a page at random from the lowest non-empty category. It’s a simple and efficient algorithm but doesn’t always provide the best performance.

Question 57

First-In, First-Out (FIFO) Algorithm

Answer 57

The FIFO algorithm replaces the oldest page, i.e., the page that was loaded first. It’s simple and inexpensive to implement but can suffer from the Belady’s Anomaly where increasing the number of page frames results in more page faults.

Question 58

Second-Chance Algorithm

Answer 58

The Second-Chance algorithm is a variation of the FIFO algorithm that avoids the problem of replacing a heavily used page by checking the reference bit and giving a second chance if it’s set.

Question 59

Clock Page Replacement Algorithm

Answer 59

The Clock algorithm is an efficient implementation of the Second-Chance algorithm that arranges pages in a circular queue (like a clock) and uses a single hand to sweep around replacing pages.

Question 60

Least Recently Used (LRU) Algorithm

Answer 60

The LRU algorithm replaces the page that hasn’t been used for the longest time. It’s good for temporal locality but can be expensive to implement perfectly.

Question 61

Working Set Page Replacement Algorithm

Answer 61

The Working Set algorithm tries to keep the set of pages that a program is currently using (its working set) in memory to minimize page faults. It’s based on the principle of locality but can be difficult to determine the working set accurately.

Question 62

WSClock Page Replacement Algorithm

Answer 62

The WSClock algorithm is a combination of the Clock algorithm and the Working Set algorithm that tries to get the benefits of both. It’s more complex but can provide good performance in a variety of situations.

Question 63

What’s a page fault?

Answer 63

A page fault is an exception that’s raised by computer hardware when a running program accesses a memory page that is mapped into the virtual address space, but not loaded into physical memory.

Question 64

Page Fault Handling

Answer 64

Page fault handling is a crucial part of a system’s memory management. Here are the steps taken when a page fault occurs:

1. Interrupt and handler invocation: A page fault triggers an interrupt. The system stops the execution of the current process and invokes the page fault handler routine in the kernel.
2. Verification: The handler first verifies that the page reference was legal, meaning that the page is indeed part of the process’s virtual address space.
3. Page Frame Allocation: If the page is not already loaded in physical memory, the handler looks for a free page frame. If there are no free page frames, it must select one for replacement using a page replacement algorithm, which may involve writing the replaced page back to disk if it has been modified.
4. Page Loading: The handler then loads the requested page into the allocated page frame from the backing store (typically a disk or SSD).
5. Page Table Update: The handler updates the process’s page table to reflect the new mapping between the virtual page and the physical page frame.
6. Process Restart: Finally, the handler restarts the process from the instruction that caused the page fault. Because the process’s address space now includes the previously faulted page, the instruction can execute successfully this time.

Question 65

What is paging?

Answer 65

Storage mechanism used to retrieve processes from the secondary storage into the main memory in the form of pages.

Question 66

What are the advantages and disadvantages of using larger page sizes in a paging system?

Answer 66

Advantages include fewer page faults if the process’s working set is all on one page, fewer pages to manage, and potentially improved TLB performance due to a decreased miss rate. Disadvantages include increased internal fragmentation, as not all of the space in a large page may be used, and potentially less efficient use of memory if a process only needs a small amount of additional memory that forces allocation of a large page.

Question 67

Consider a computer system with a 32-bit logical address space, 4KB pages and 4 bytes per page table entry. How many entries will there be in a single-level page table?

Answer 67

The page size is 4KB, or 2^12 bytes (as 2^10 is approximately 1K). This means that the offset within a page is 12 bits, leaving 20 bits for the page number in a 32-bit address. Therefore, there will be 2^20 or 1,048,576 entries in the page table.

Question 68

Describe a situation where a multi-level page table would be beneficial. What are the trade-offs in using a multi-level page table?

Answer 68

A multi-level page table can be beneficial when the logical address space is large, but the actual amount of memory used by a process is relatively small. In this case, a single-level page table might be very large, but mostly empty. A multi-level page table allows memory to be allocated for page table entries only as they are needed. The trade-off is that translating a logical address to a physical address may require accessing memory multiple times: once for each level of the page table.

Question 69

How does paging support the sharing of code or data between processes? What are the potential security issues and how can they be addressed?

Answer 69

Paging supports the sharing of code or data by allowing different processes to have page table entries that point to the same physical page. This is often used to allow multiple processes to share a single copy of a code library. Security issues arise because this sharing can potentially allow one process to read or modify the data of another process. This can be addressed through mechanisms such as copy-on-write (where a shared page is duplicated if a process tries to write to it) and setting permissions on pages to control which processes can read, write, or execute them.

Question 70

Consider a system with a TLB hit rate of 80%, a main memory access time of 100ns, and a TLB access time of 20ns. What is the effective memory access time for this system?

Answer 70

Effective access time is calculated as (TLB hit time + Memory access time) * TLB hit rate + (TLB access time + 2 * Memory access time) * (1 - TLB hit rate). Therefore, the effective access time would be (20ns + 100ns) * 0.8 + (20ns + 2*100ns) * 0.2 = 180ns.

Question 71

What’s Translation Lookaside Buffer

Answer 71

Hardware cache in a computer’s memory management unit (MMU) that improves virtual-to-physical address translation speed. This translation process is crucial for memory accesses in systems using virtual memory.

In a system that uses virtual memory, the memory address referenced by a program (the virtual address) is not the same as the physical address where the data is actually stored in memory. Instead, the system maintains a map (typically a page table) from virtual addresses to physical addresses.

Question 72

How does associativity affect the performance of a TLB?

Answer 72

Associativity in a TLB refers to the number of slots or entries in the TLB that a given page can potentially be mapped to. The greater the degree of associativity, the greater the number of potential slots for each page, which can potentially increase the TLB hit rate and hence improve performance. However, higher associativity can make the TLB hardware more complex and potentially slower, and it can also increase power consumption.

Question 73

How does the size of the TLB, the size of the pages, and the organization of the virtual memory (such as the number of levels in the page table) interact to affect system performance?

Answer 73

This is a complex question as the interaction between these factors can be quite intricate. In general, larger TLBs can potentially improve the hit rate and thus reduce the average memory access time. Larger pages can also improve the TLB hit rate, but they can potentially increase internal fragmentation. A multi-level page table can reduce the memory needed for the page table, but it can potentially increase the number of memory accesses needed for a page table walk on a TLB miss. The optimal combination of these parameters depends on the specifics of the workload and the hardware.

Question 74

In a system that supports both page-level and segment-level memory management, where in the memory management process would the TLB come into play?

Answer 74

The TLB is part of the paging mechanism of memory management. It caches translations from virtual page numbers to physical page numbers. So, if a system supports both segmentation and paging, the TLB would typically be used after the segmentation mechanism has translated a logical address to a virtual address, and now the paging mechanism needs to translate this virtual address to a physical address.