Module 3: Transistors / Logic Gates / Combinational Logic

Question 1

transistor

Answer 1

electrical device that acts as an electrical switch; typically made from silicon

Question 2

MOSFET

Answer 2

(metal-oxide semiconductor field-effect transistor) a specialized field-effect transistor or FET; like all transistors, used for switching or amplifying signals

Question 3

nMOSFET (nMOS)

Answer 3

channel carries negative charges (ON when gate is high voltage)

Question 4

pMOSFET (pMOS)

Answer 4

channel carries positive charges (holes) / ON when gate is low voltage or 0

Question 5

CMOS

Answer 5

pairing nMOS and pMOS transistors together

Question 6

Inverter

Answer 6

logic gate that implements logical negation

Question 7

NAND

Answer 7

logic gate producing an output that is false only if all its inputs are true; parallel structure on top and series on bottom

Question 8

NOR

Answer 8

result of the negation of the OR operator; can also be seen as an AND gate with all the inputs inverted; parallel structure on bottom and series on top

Question 9

Gate delays

Answer 9

longest path (in gates) through a circuit

Question 10

PLA (programmable logic array)

Answer 10

a kind of programmable logic device used to implement combinational logic circuits

a tool to go from truth table to logic gates

not the most efficient but it always works!

Question 11

half adder

Answer 11

logic circuit implementing binary addition

Question 12

combinational logic

Answer 12

using several logic gates together to create a logic circuit that performs work for us like adders multipliers, etc.

Question 13

multiplexer (MUX)

Answer 13

device that combines several analogs or digital input signals and forwards them into a single output line

Question 14

transistor: electronic switch

Answer 14

• 2 complementary flavors: nMOSFET and pMOSFET (CMOS)

* controls the flow of current in a circuit

Question 15

general structure for CMOS

Answer 15

2 parts

• PUN (pull-up network): pulls output “up” to PWR (logic 1)
  rule: PUN can only have pMOS transistors
• PDN (pull down network): pulls output “down” to GND (logic 0)
  rule: PDN can only contain nMOS transistors

either PUN or PDN is on at any given time
if both are on then there is a short circuit

output is taken where PUN and PDN intersect

Question 16

how a transistor works

Answer 16

off: electrons cannot move between the source and drain, no path exists under gate and the transistor is OFF

in nMOS:
positive charge repels holes from under the gate
attracts electrons from source/drain regions
creates an n-type channel under the oxide (this is why it is called n-type)
current can flow from drain to source; electrons enter source and exit drain
electrons cannot penetrate oxide (electric field forms across oxide, why it’s called “FET”)

Question 17

Logic Minimization using LAWS of Boolean Algebra

Answer 17

Identities:
X AND 1 = X ; X AND 0 = 0
X OR 1 = 1; X OR 0 = X

Associative laws:
A AND (B AND C) = (A AND B) AND C
A OR (B AND C) = (A OR B) AND (A OR C)

De Morgan’s laws:
A NAND B = NOT (A AND B) = (NOT A) or (NOT B)
A NOR B = NOT (A OR B) = (NOT A) AND (NOT B)

Question 18

Binary Number Calculators

Answer 18

N-bit incrementer: N 1-bit half adders
Subtractor: negate combined with N-bit incrementer
Selector (MUX):
-n select bits choose from 2^n inputs
-adder/subtractor
Multiplier: combinational multiplier using adders and MUXs