Mitigation Techniques Flashcards

1
Q

Stack Mitigation Techniques

A

RELRO, NX (Non-eXecutable stack), PIE (Position Independent Executable), Stack Canary

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2
Q

How does the stack grows in reference to its addresses?

A

Grows from high addresses to low addresses

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3
Q

Difference between Partial-RELRO vs Full RELRO

A

Full RELRO populates the GOT (Global Offset Table) at startup and makes it read only. Partial RELRO has the GOT still writable at runtime while other areas are remapped as read only.

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4
Q

PIE

A

Positiion Independent Executable

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5
Q

ASLR

A

Address Space Layout Randomization

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6
Q

PIE vs ALSR

A

ASLR:
Is a feature of the OS.
Randomizes base memory addresses in virtual address space.
PIE:
Is a feature of the binary.
It compiles a binary so it is independent of the base address.

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7
Q

Stack Canary

A

Feature to push a canary to the stack that is checked before returning.

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8
Q

Types of Stack Canaries

A

Static, Random, Terminator

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9
Q

Stack Pivot Mitigation Tecniques

A

Virtual Memory Permission, Hooks

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10
Q

Virtual Memory Permission

A

Enforces that the SP is within a certain memory region at system call entry.

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11
Q

Hooks

A

Runtime security software checks that the SP is within sane bounds at critical functions.

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12
Q

ROP Mitigation Tecniques

A

Control Flow Guard, Return Flow Guard, Indirect Branch Tracking, Pointer Authentication Codes, Shadow Stacks,

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13
Q

Control Flow Guard

A

Software-enforced forward CFI. At compile time it generates a list of valid indirect branch targets. At load time, it creates bitmap storing valid addresses. At runtime, it checks actual addresses against bitmap.

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14
Q

Return Flow Guard

A

Software-enforced back-edge CFI. Enforces that functions return to the address that they were called from. At function prologue, store return address in shadow stack. At function epilogue, compare return address.

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15
Q

Problems with Return Flow Guard

A

Inherent race conditions by another thread overwriting return address on stack before load occurs. Shadow Stack memory is writable.

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16
Q

Indirect Branch Tracking

A

Hardware-enforced forward CFI. It uses a endbr64 instruction to signal a valid indirect call.

17
Q

Pointer Authentication Codes

A

Hardware-enforced backward CFI. Return address pointer is signed. Link register X30 holds the authentication codes in high bits. Before returning, it authenticates the return address.

18
Q
A