MIPS Instruction ref Flashcards

1
Q

The manner in which the processor executes an instruction and advances its program counters is as follows:

A

execute the instruction at PC
copy nPC to PC
add 4 or the branch offset to nPC

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2
Q

What is the difference between signed and unsigned instructions?

A

The only difference between signed and unsigned instructions is that signed instructions can generate an overflow exception and unsigned instructions can not.

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3
Q

What kind of values are arithmetic immediate values?

A

ALL arithmetic immediate values are sign-extended.

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4
Q

What is ADD

what is its encoding, operation and overflow?

A

Add (with overflow)

add $d, $s, $t

$d = $s + $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0000

Adds two registers and stores the result in a register

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5
Q

What is ADDI

what is its encoding, operation and overflow?

A

Add immediate (with overflow)

addi $t, $s, imm

$t = $s + imm; advance_pc (4);

0010 00ss ssst tttt iiii iiii iiii iiii

Adds a register and a sign-extended immediate value and stores the result in a register

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6
Q

What is ADDIU

what is its encoding, operation and overflow?

A

Add immediate unsigned (no overflow)

addiu $t, $s, imm

$t = $s + imm; advance_pc (4);

0010 01ss ssst tttt iiii iiii iiii iiii

Adds a register and a sign-extended immediate value and stores the result in a register

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7
Q

What is ADDU

what is its encoding, operation and overflow?

A

Add unsigned (no overflow)

addu $d, $s, $t

$d = $s + $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0001

Adds two registers and stores the result in a register

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8
Q

What is AND

what is its encoding, operation and overflow?

A

Bitwise and

and $d, $s, $t

$d = $s & $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0100

Bitwise ands two registers and stores the result in a register

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9
Q

What is ANDI

what is its encoding, operation and overflow?

A

Bitwise and immediate

andi $t, $s, imm

$t = $s & imm; advance_pc (4);

0011 00ss ssst tttt iiii iiii iiii iiii

Bitwise ands a register and an immediate value and stores the result in a register

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10
Q

What is BEQ

what is its encoding, operation and overflow?

A

Branch on equal

beq $s, $t, offset

if $s == $t advance_pc (offset &laquo_space;2)); else advance_pc (4);

0001 00ss ssst tttt iiii iiii iiii iiii

Branches if the two registers are equal

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11
Q

What is BGEZ

what is its encoding, operation and overflow?

A

Branch on greater than or equal to zero

bgez $s, offset

if $s >= 0 advance_pc (offset &laquo_space;2)); else advance_pc (4);

0000 01ss sss0 0001 iiii iiii iiii iiii

Branches if the register is greater than or equal to zero

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12
Q

What is BGEZAL

what is its encoding, operation and overflow?

A

Branch on greater than or equal to zero and link

bgezal $s, offset

if $s >= 0 $31 = PC + 8 (or nPC + 4); advance_pc (offset &laquo_space;2)); else advance_pc (4);

0000 01ss sss1 0001 iiii iiii iiii iiii

Branches if the register is greater than or equal to zero and saves the return address in $31

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13
Q

What is BGTZ

what is its encoding, operation and overflow?

A

Branch on greater than zero

bgtz $s, offset

if $s > 0 advance_pc (offset &laquo_space;2)); else advance_pc (4);

0001 11ss sss0 0000 iiii iiii iiii iiii

Branches if the register is greater than zero

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14
Q

What is BLEZ

what is its encoding, operation and overflow?

A

Branch on less than or equal to zero

blez $s, offset

if $s <= 0 advance_pc (offset &laquo_space;2)); else advance_pc (4);

0001 10ss sss0 0000 iiii iiii iiii iiii

Branches if the register is less than or equal to zero

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15
Q

What is BLTZ

what is its encoding, operation and overflow?

A

Branch on less than zero

bltz $s, offset

if $s < 0 advance_pc (offset &laquo_space;2)); else advance_pc (4);

0000 01ss sss0 0000 iiii iiii iiii iiii

Branches if the register is less than zero

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16
Q

What is BNE

what is its encoding, operation and overflow?

A

Branch on not equal

bne $s, $t, offset

if $s != $t advance_pc (offset &laquo_space;2)); else advance_pc (4);

0001 01ss ssst tttt iiii iiii iiii iiii

Branches if the two registers are not equal

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17
Q

What is DIV

what is its encoding, operation and overflow?

A

Divide

div $s, $t

$LO = $s / $t; $HI = $s % $t; advance_pc (4);

0000 00ss ssst tttt 0000 0000 0001 1010

Divides $s by $t and stores the quotient in $LO and the remainder in $HI

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18
Q

What is DIVU

what is its encoding, operation and overflow?

A

Divide unsigned

divu $s, $t

$LO = $s / $t; $HI = $s % $t; advance_pc (4);

0000 00ss ssst tttt 0000 0000 0001 1011

Divides $s by $t and stores the quotient in $LO and the remainder in $HI

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19
Q

What is JAL

what is its encoding, operation and overflow?

A

Jump and link

jal target

$31 = PC + 8 (or nPC + 4); PC = nPC; nPC = (PC & 0xf0000000) | (target &laquo_space;2);

0000 11ii iiii iiii iiii iiii iiii iiii

Jumps to the calculated address and stores the return address in $31

20
Q

What is JR

what is its encoding, operation and overflow?

A

Jump register

jr $s

PC = nPC; nPC = $s;

0000 00ss sss0 0000 0000 0000 0000 1000

Jump to the address contained in register $s

21
Q

What is LB

what is its encoding, operation and overflow?

A

Load byte

lb $t, offset($s)

$t = MEM[$s + offset]; advance_pc (4);

1000 00ss ssst tttt iiii iiii iiii iiii

A byte is loaded into a register from the specified address.

22
Q

What is LUI

what is its encoding, operation and overflow?

A

Load upper immediate

lui $t, imm

$t = (imm &laquo_space;16); advance_pc (4);

0011 11– —t tttt iiii iiii iiii iiii

The immediate value is shifted left 16 bits and stored in the register. The lower 16 bits are zeroes.

23
Q

What is LW

what is its encoding, operation and overflow?

A

Load word

lw $t, offset($s)

$t = MEM[$s + offset]; advance_pc (4);

1000 11ss ssst tttt iiii iiii iiii iiii

A word is loaded into a register from the specified address.

24
Q

What is MFHI

what is its encoding, operation and overflow?

A

Move from HI

mfhi $d

$d = $HI; advance_pc (4);

0000 0000 0000 0000 dddd d000 0001 0000

The contents of register HI are moved to the specified register.

25
Q

What is MFLO

what is its encoding, operation and overflow?

A

Move from LO

mflo $d

$d = $LO; advance_pc (4);

0000 0000 0000 0000 dddd d000 0001 0010

The contents of register LO are moved to the specified register.

26
Q

What is MULT

what is its encoding, operation and overflow?

A

Multiply

mult $s, $t

$LO = $s * $t; advance_pc (4);

0000 00ss ssst tttt 0000 0000 0001 1000

Multiplies $s by $t and stores the result in $LO.

27
Q

What is MULTU

what is its encoding, operation and overflow?

A

Multiply unsigned

multu $s, $t

$LO = $s * $t; advance_pc (4);

0000 00ss ssst tttt 0000 0000 0001 1001

Multiplies $s by $t and stores the result in $LO.

28
Q

What is NOOP

what is its encoding, operation and overflow?

A

no operation

noop

advance_pc (4);

0000 0000 0000 0000 0000 0000 0000 0000

Performs no operation.

29
Q

What is OR

what is its encoding, operation and overflow?

A

Bitwise or

or $d, $s, $t

$d = $s | $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0101

Bitwise logical ors two registers and stores the result in a register

30
Q

What is ORI

what is its encoding, operation and overflow?

A

Bitwise or immediate

ori $t, $s, imm

$t = $s | imm; advance_pc (4);

0011 01ss ssst tttt iiii iiii iiii iiii

Bitwise ors a register and an immediate value and stores the result in a register

31
Q

What is SB

what is its encoding, operation and overflow?

A

Store byte

sb $t, offset($s)

MEM[$s + offset] = (0xff & $t); advance_pc (4);

1010 00ss ssst tttt iiii iiii iiii iiii

The least significant byte of $t is stored at the specified address.

32
Q

What is SLL

what is its encoding, operation and overflow?

A

Shift left logical

sll $d, $t, h

$d = $t &laquo_space;h; advance_pc (4);

0000 00ss ssst tttt dddd dhhh hh00 0000

Shifts a register value left by the shift amount listed in the instruction and places the result in a third register. Zeroes are shifted in.

33
Q

What is SLLV

what is its encoding, operation and overflow?

A

Shift left logical variable

sllv $d, $t, $s

$d = $t &laquo_space;$s; advance_pc (4);

0000 00ss ssst tttt dddd d— –00 0100

Shifts a register value left by the value in a second register and places the result in a third register. Zeroes are shifted in.

34
Q

What is SLT

what is its encoding, operation and overflow?

A

Set on less than (signed)

slt $d, $s, $t

if $s < $t $d = 1; advance_pc (4); else $d = 0; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 1010

If $s is less than $t, $d is set to one. It gets zero otherwise.

35
Q

What is SLTI

what is its encoding, operation and overflow?

A

Set on less than immediate (signed)

slti $t, $s, imm

if $s < imm $t = 1; advance_pc (4); else $t = 0; advance_pc (4);

0010 10ss ssst tttt iiii iiii iiii iiii

If $s is less than immediate, $t is set to one. It gets zero otherwise.

36
Q

What is SLTU

what is its encoding, operation and overflow?

A

Set on less than unsigned

sltu $d, $s, $t

if $s < $t $d = 1; advance_pc (4); else $d = 0; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 1011

If $s is less than $t, $d is set to one. It gets zero otherwise.

37
Q

What is SRA

what is its encoding, operation and overflow?

A

Shift right arithmetic

sra $d, $t, h

$d = $t&raquo_space; h; advance_pc (4);

0000 00– —t tttt dddd dhhh hh00 0011

Shifts a register value right by the shift amount (shamt) and places the value in the destination register. The sign bit is shifted in.

38
Q

What is SRL

what is its encoding, operation and overflow?

A

Shift right logical

srl $d, $t, h

$d = $t&raquo_space; h; advance_pc (4);

0000 00– —t tttt dddd dhhh hh00 0010

Shifts a register value right by the shift amount (shamt) and places the value in the destination register. Zeroes are shifted in.

39
Q

What is SRLV

what is its encoding, operation and overflow?

A

Shift right logical variable

srlv $d, $t, $s

$d = $t&raquo_space; $s; advance_pc (4);

0000 00ss ssst tttt dddd d000 0000 0110

Shifts a register value right by the amount specified in $s and places the value in the destination register. Zeroes are shifted in.

40
Q

What is SUB

what is its encoding, operation and overflow?

A

Subtract

sub $d, $s, $t

$d = $s - $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0010

Subtracts two registers and stores the result in a register

41
Q

What is SUBU

what is its encoding, operation and overflow?

A

Subtract unsigned

subu $d, $s, $t

$d = $s - $t; advance_pc (4);

0000 00ss ssst tttt dddd d000 0010 0011

Subtracts two registers and stores the result in a register

42
Q

What is SW

what is its encoding, operation and overflow?

A

Store word

sw $t, offset($s)

MEM[$s + offset] = $t; advance_pc (4);

1010 11ss ssst tttt iiii iiii iiii iiii

The contents of $t is stored at the specified address.

43
Q

What is SYSCALL

what is its encoding, operation and overflow?

A

System call

syscall

advance_pc (4);

0000 00– —- —- —- —- –00 1100

Generates a software interrupt.

44
Q

What is XOR

what is its encoding, operation and overflow?

A

Bitwise exclusive or

xor $d, $s, $t

$d = $s ^ $t; advance_pc (4);

0000 00ss ssst tttt dddd d— –10 0110

Exclusive ors two registers and stores the result in a register

45
Q

What is XORI

what is its encoding, operation and overflow?

A

Bitwise exclusive or immediate

xori $t, $s, imm

$t = $s ^ imm; advance_pc (4);

0011 10ss ssst tttt iiii iiii iiii iiii

Bitwise exclusive ors a register and an immediate value and stores the result in a register