Midterm 1- Slide Decks A3-A4 Flashcards
What are the sub-parts of the CPU?
registers, ALU, control
What 4 types of instructions can all CPUs perform?
- Data movement instructions(transfer data from memory to CPU, and from CPU to memory, or between two registers)
- Arithmetic & logic operations on data(ADD, SUB, AND, XOR, NEG)
- Program sequencing and control instructions (unconditional/conditional branches)
- Input/output transfers(transfer data from device to memory, or memory to device)
How is a Read from performed?
- memory retrieves content at address given by CPU
- value in memory does not change (READ does not change bit string EVER!)
How is the Write memory instruction performed?
- Memory overwrites contents at address given by CPU with data given by CPU
- value overwritten is LOST (bits change unless it has been preserved somewhere else before being overwritten
Which register in the CPU is used to hold the address of the instruction being executed?
Program counter (PC)
Which register in the CPU holds the instruction being executed (the bit string with the encoded instruction)?
Instruction register (IR)
What kind of program converts assembly language to machine language?
The assembler
What is a RISC Processor?
RISC processors have one-word instructions and require arithmetic operands to be in CPU registers; so in RISC, can’t have: add 100, 200 (adding words at addresses in memory). RISC processors have smaller instruction
What is a CISC Processor?
CISC processors have variable length instructions (many multi-word instructions) and allow ALU operands directly from memory
Intels are what type of CPUs?
CISC processors
Which type of CPUs are ARMs and Mac M1, M2, and M3?
RISC processors
Which of the two types of processor architectures is called load/store?
RISC
How many assembly language instructions typically correspond to a single statement in a high-level language (such as Java, C++, or C)?
Multiple assembly language instruction
When can the address in the PC register be incremented to the address of the next instruction?
After the address has been sent to memory, so that the instruction can be read/fetched from memory.
Which kinds of instructions in the CPU are used to execute if or else (or loop) statements in a high-level language?
Branch/Jump instructions
BLZ- goes to label in instruction to execute next instruction if last ALU result was less that 0.
BR- will go to label to execute next instruction without any condition
What is the Processor Status Register (or PSR)?
Four 1 bit flags in the PSR that are used by processor to store information about the result of executing an ALU instruction
What four flags does the PSR have?
S - Sign flag: Set to 1 by processor of result of last ALU operation was negative (msb of result is 1); otherwise set to 0
Z - Zero flag: Set to 1 by the processor if the result of the last ALU operation was 0; otherwise eat to 0
C - Carry flag: Set to 1 if result of last instruction generated a carry of 1; otherwise set to 0
O - Set to 1 if last two carries are different, otherwise set to 0.
What are labels used for in assembly language?
To mark addresses of data or instructions in a program
Do labels occupy any space in memory? Why or why not?
Labels use no space in memory because they are NOT data
Which built-in data structures does the CPU recognize?
None. There are NO built-in data structures which the CPU recognizes
What is a subroutine (function/procedure/method)?
Function: Some task may have to be done many times using different sets of data
Procedure: Implement task in one block of instructions; this is the subroutine
Method: We use a subroutine call. Will return to the instruction where the call was made
How is a subroutine called?
Caller subroutine puts parameters for callee in frame of callee. When called, address of next instruction after call will be pushed onto stack
How is a subroutine call different from a branch?
A return address must be saved
In what two ways can the return address be saved?
Single link register and stack
Which way of saving a return address has a limitation on the number of subroutine calls which can be made before returning to the original calling subroutine?
Stack, since the size is fixed and it has a limit. We do not have an infinite amount of memory
Besides being used to save a return address, what other kinds of data related to a subroutine call can a stack be used for?
Parameters and return value
How many instructions in assembly language correspond to a single machine language instruction?
One assembly instruction always per machine language instruction
Does every type of CPU (Intel, ARM, Mac M1, SPARC, PowerPC, MIPS etc.) use the same assembly language?
No, each CPU has its own assembly language and some (like Intels) have several
How many assembly language instructions does a high-level language statement (Java, C++, C, etc.) correspond to?
Typically more than one; high-level language statements typically require multiple assembly instructions
Which real CPU architecture is the Y86-64 simulated CPU based on?
Intel X86-64
What is Instruction Set Architecture (ISA)?
The human programmer visible machine interface. This means part of hardware which the programmer can see (such as instruction set, register, memory organization)
What are the two major types of ISAs today?
RISC and CISC
How many registers does Y86-64 have?
15 64-bit registers
Why is the number of registers in Y86 unlike a real CPU?
Real CPUs always have a number of registers equal to a power of 2
How many condition codes (or flags) does Y86 have, and what are they?
There are 3 condition codes (or flags) and they are ZF(zero), SF(negative), OF(overflow).No carry flag because we are dealing with signed ints only, no unsigned overflow possible
How are the condition codes/flags in Y86 set by the processor?
Single- bit flags set by arithmetic or logical instruction.
ZF- Set if the result of the last ALU operation is 0
SF- Set if the result of last ALU operation resulted in sign bit (msb of result is 1)
OF- Set if result of last ALU operation resulted in signed overflow
No C flag because Y86 CPU works only on signed numbers
What kinds of operands can the Y86 simulated CPU work on?
Signed Operands
What sizes of operands can the Y86 simulated CPU work on? How is this different from real CPUs?
Only 8 bytes (64 bits). Real CPUs can work on data of different sizes 1 bytes, 2 bytes, 4 bytes, or 8 bytes.
What size are addresses in Y86?
8 bytes (64 bits)
What is the difference in the way multi-byte data is stored in memory in a big-endian versus a little-endian system?
Big-endian: most significant byte of data is stored at lowest address; least significant byte stores at highest number address
Little-endian: least significant byte is stored first and most significant byte is stored last
Is Y86 (and Intel) big-endian or little-endian?
Little-endian
