Microcontroller concepts

Question 1

What is the hosting application/hardware setup of a MCU?

Answer 1

1. Power Supply
2. Oscillator
3. Programmer (+debugger)
4. Most applications also need peripherals

Question 2

Datapath

Answer 2

Datapath is a collection of registers (fast memory) and a set of microoperations on the data

Question 3

Control

Answer 3

Directs the ordered execution of the microoperations, to get the desired transformation

Question 4

How many buses do normal systems have?

Answer 4

3 Buses:
- Data holds the data itself
- Address indicates where to store (or read) the data
- Control specifies how the data is transported

Width of the buses specifies the amount of data that can be transferred in 1 clock cycle

Question 5

What are the steps comprised in an instruction cycle?

Answer 5

Fetch: retrieve instructions from memory and save to IR (Instruction Register)

Decode: Extract the operation code from the instruction and decode it

Execute: Perform the sequence of steps necessary to execute the instruction

Next: Adjust value of PC (program counter)

Question 6

What is RAM and what are some of its features?

Answer 6

Random Access Memory

• Normal RAM is volatile and loses information without power.
• Often used for changing data (e.g. variables)
• Fast

Question 7

What is ROM and what are some of its features?

Answer 7

Read Only Memory

• Non-volatile memory
• Used for code
• Limited number of write cycles
• Typically slower than RAM

Question 8

What is the goal of a program? What are some metrics for memory?

Answer 8

Execute as quickly as possible

Metrics:
- Access time
- Storage capacity

Question 9

What is the benefit of having multiple buses that access the same memory?

Answer 9

It means that the memory point can be accessed simultaneously and you don’t have to wait for the bus to become available (this reduces latency)

Question 10

What is the benefit of using STM32Cube?

Answer 10

STM32Cube generates all initialization code automatically

Question 11

How does RAM differ from a register file (RF)?

Answer 11

RAM is typically larger (storage size)
RAM stores data using a bit storage approach

Question 12

What are the differences between Register files (RFs), SRAM and DRAM?

Answer 12

RF:
- Fastest
- Biggest Size

SRAM:
- Fast
- More compact than RFs

DRAM:
- Slowest (& refreshing takes time) Refreshing is the regular reading of something then writing it back to avoid dissipation
- Very compact

Question 13

What size items should be used for RFs, SRAM and DRAM?

Answer 13

RFs - small items

SRAM - Large items

DRAM - Huge items (DRAM’s big capacitor requires special chip design process)

Question 14

What is cache?

Answer 14

Small fast memory, that temporarily holds copies of block data

~10x faster than main memory

if instructions are present in cache, they can be executed much faster

Question 15

Explain Cache hit & Cache miss?

Answer 15

When a piece of data is required, the cache is checked first. If:
- The item is found, there is a cache hit & the data is retrieved.
-The data is not found, there is a cache miss and the item must be obtained form the main memory. The complete block containing the word is then brought into the cache to avoid a miss next time

Question 16

How can you limit the CPU workload of controlling I/Os?

Answer 16

Use peripheral processor to offload some of the tasks

Question 17

What does the data exchange of peripheral processors look like?

Answer 17

1. Periph <-> CPU:
   CPU reads/writes all data to peripheral processor, which handles the I/Os
2. Periph <-> Memory
   Peripheral processor may directly access memory and load/store data directly
3. Periph <-> Periph
   Peripheral processor may directly communicate with other peripherals over the system bus

Question 18

Computation of timer prescalers?

Answer 18

1. Determine input clock frequency that is fed into the timer
2. Define the desired frequency
3. Calculate prescaler value: input clock frequency/desired frequency
4. Choose closest available prescaler setting e.g. 1,2,4,8,32,54,256 etc. basically the number of bits)

Question 19

What is polling? Drawback?

Answer 19

Constant checking for the occurrence of an event

Time-consuming and requires change in focus from the foreground task

Question 20

What are interrupts used for?

Answer 20

Interrupts handle asynchronous events (e.g. timer ticking, keyboard/button press)

They are triggered by hardware or by specific software conditions

Question 20

What is an interrupt and how does it differ from polling?

Answer 20

Using interrupts means you do not repeatedly check for the occurrence of an event.

Instead, when the event happens, we allow it to disrupt the program and force something to happen.

Analogy: Phone call. You are forced to decide to ignore it, answer it, or decline

Question 21

What happens after an interrupt is triggered?

Answer 21

The CPU stops executing the current code and jumps to an ‘Interrupt Service Routine’ (ISR)

Interrupts do not return anything and variables can’t be passed to them

Question 22

What does an interrupt consist of?

Answer 22

1. Interrupt event and source
2. The interrupt handler
3. The interrupt service routine (ISR) is called by the interrupt handler

Once ISR is executed, MCU jumps back into the code

Question 23

What is masking in the context of interrupts?

Answer 23

If you have multiple interrupt lines grouped together, you can specify which ones can generate an interrupt

Question 24

What are the options when you have multiple interrupts?

Answer 24

2 ideas:

• Interrupt nesting: Interrupt the first interrupt to execute the second one
• Tail-chaining: Finish processing the first interrupt before beginning on the second one

Question 25

What are the benefits of low power modes?

Answer 25

Increased battery life (mobile applications)

lowered power consumption (stationary applications)

Question 26

Compare power optimization and clock frequency?

Answer 26

In low power mode:
- Very slow clock frequency (100kHz)
- Very energy efficient

Normal running mode:
- Full speed (80MHz)
- Not very energy efficient

Question 27

Name some low power modes?

Answer 27

• Shut down
• Stop
• Standby
• Sleep
• Low power sleep

Question 28

Features of sleep & low power sleep modes?

Answer 28

• CPU is stopped
• Peripherals and DMA can still work
• Can wake up CPU with an interrupt

Question 29

Until what stop mode can GPIOs be used?

Answer 29

Until stop 2 mode

Question 30

4 components of the task interaction model

Answer 30

• The information (data or signals being moved)
• The place (from which the info is moved from and to)
• Control and synchronization
• Transport mechanism (physical means by which it is moved)

Question 31

3 types of direction of flow

Answer 31

• Simplex: information being sent in one direction only
• Half Duplex: Information being sent in both directions but only one at a time
• Duplex: Information can be sent in both directions simultaneously

Question 32

4 ways to relay a message

Answer 32

• Unicast (point-to-point)
• Broadcast (message sends same info to all components e.g. ‘Reset’)
• Multicast (Single sender transmits to reduced subset of receivers)
• Anycast (Message to one recipient from a group of messengers)

Question 33

Types of transport mechanisms

Answer 33

• Ring
• Star
• Bus
• Line

Question 34

Interconnect architecture of a Star

Answer 34

• Master-slave arrangement
• Slave-to-slave communication must go through the master (middle node)
• Master initiates and directs everything in the system
• Master is single point of failure (communication continues if slave fails, but not master)
• Example: USB (Star-bus)

Question 35

Interconnect Architecture: Ring (Daisy Chain)

Answer 35

• No bus master (all considered equal)
• Each device has unique address
• Message arrives, if addressed to me I read it. If not, I pass it on to the next device
• In theory only needs 1 receiver, and 1 transmitter

Question 36

Interconnect Architecture: Parallel Bus

Answer 36

• Each device connected on a single cable (line)
• May or may not be a bus master
• All have unique addresses

Question 37

Which architecture has the highest bandwidth?

Answer 37

Star