Memory Management: Demand Paging Flashcards

1
Q

What is Virtual/Logical Address Space?

A

It is the memory the programmer perceives their program to have.

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2
Q

What is Physical Address Space?

A

It refers to the actual location of the program within the physical memory.

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3
Q

List the Memory Mapping Methods.

A

○ Base and bounds
○ Segmentation
○ Paging

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4
Q

Explain Segmentation.

A

Segmentation enables memory sharing between processes. This is achieved by:
● Creating a segment for the shared data.
● Adding a segment entry in the segment table for each process, pointing to the shared segment in memory.
For instance, running the same program in different processes might require sharing code, or reading the same file in different processes might involve sharing memory corresponding to the file. Segmentation allows for this memory sharing that base and bounds cannot

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5
Q

What is the base and bounds memory mapping method?

A

A method of memory mapping that uses a base register to store the starting address of a process’s memory in physical memory and a bounds register to store the size of the process’s memory.

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6
Q

What is external fragmentation?

A

External fragmentation occurs when there is enough free memory to satisfy a request, but the memory is not contiguous.

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7
Q

What is memory compaction? What are its drawbacks?

A

Memory compaction is a technique used to reduce external fragmentation. It involves rearranging segments in physical memory to get rid of holes.
○ Memory compaction is expensive and inefficient.

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8
Q


What is paging? What are a page and a frame?

A

○ Paging is a memory mapping method that divides a process’s address space into fixed-size portions called pages and physical memory into fixed-size portions called frames.
○ The size of a page is equal to the size of a frame.

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9
Q

What are the two components of a virtual address in paging?

A

○ VPN: Virtual page number
○ Offset: offset within the page

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10
Q

What is a page table?

A

A data structure used to map virtual addresses to physical addresses. It is indexed by page number and contains the frame number of the page in memory. Each process has its own page table.

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11
Q

What problems arise from large page tables?

A

○ Page tables can become very large, especially with large address spaces.
○ A large amount of memory may be required just to store page tables.
○ Address spaces are often sparsely used, meaning that a significant portion of the page table may be unused.
○ Access to unused portions of the address space may appear valid, which is undesirable.

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12
Q

What is the valid/invalid bit in a page table entry?

A

○ A bit that indicates whether a page is currently in memory (valid) or not (invalid).

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13
Q

What are multi-level page tables?

A

○ A solution to the problem of large page tables. They use a hierarchy of page tables, where entries in higher-level page tables point to lower-level page tables.

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14
Q

What is internal fragmentation?

A

○ Internal fragmentation occurs when a portion of a page is unused.

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15
Q

What is the problem with paging address translation performance?

A

○ Paging address translation requires two memory accesses: one to access the page table and another to access the actual data.
○ This can significantly reduce performance, as memory access speeds are often a bottleneck.

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16
Q

What is the TLB?

A

○ A small, fast hardware cache that stores recent page table entries to speed up address translation.

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17
Q


Describe the steps involved in a TLB hit.

A

○ The MMU looks up the virtual page number in the TLB.
○ If the mapping is found, the MMU uses the frame number from the TLB to access the physical memory.
○ Only a single memory access is required.

18
Q

Describe the steps involved in a TLB miss.

A

○ The MMU looks up the virtual page number in the TLB.
○ If the mapping is not found, a TLB miss occurs.
○ The MMU then accesses the page table in memory to get the frame number.
○ The (frame number, page number) mapping is added to the TLB.
○ The MMU retries the address translation, which now results in a TLB hit.

19
Q

How is the TLB implemented to be fast?

A

○ The TLB is implemented using associative memory, which allows for parallel lookup by content.

20
Q

Why is the TLB small?

A

○ Associative memory, used to implement the TLB, is expensive.

21
Q

What are temporal and spatial locality?

A

○ Temporal locality: Recently accessed data is likely to be accessed again soon.
○ Spatial locality: Data near recently accessed data is likely to be accessed soon.

22
Q

How can TLB hit rate be improved?

A

○ Take advantage of temporal and spatial locality.

23
Q

What is the issue with context switching and the TLB?

A

○ When switching between processes, the TLB may contain entries for the previous process.
○ If the new process accesses a virtual page that is mapped in the TLB but belongs to the previous process, it may access the wrong memory.

24
Q

Describe two solutions to the context switching issue with the TLB.

A

○ Solution 1: Invalidate all TLB entries on process switch. This ensures that the new process starts with an empty TLB and avoids accessing wrong memory. Drawbacks: makes process switch expensive and new process incurs 100% TLB misses initially.

○ Solution 2: Add a process identifier (PID) to TLB entries. This allows the TLB to distinguish between entries from different processes. The TLB match occurs only when both the page number and PID match. This solution is cheaper because nothing needs to be done during context switching.

25
Q

What is demand paging?

A

○ A memory management technique where only the necessary pages of a process are loaded into memory. The remaining pages are kept on disk and loaded on demand when they are accessed.

26
Q

What is swapping? How does demand paging differ from swapping?

A

○ Swapping involves moving an entire process between memory and disk.
○ Demand paging loads individual pages on demand, while swapping moves the entire process.

27
Q

What are the benefits of demand paging?

A

○ Shorter process startup latency
○ Better use of main memory

28
Q

Where is a program stored when it is not entirely in memory?

A

○ Parts of the program that are currently being used are in memory.
○ The entire program is stored on disk in a special partition called the backing store or swap memory.

29
Q

What is a page fault?

A

An event that occurs when a process attempts to access a page that is not currently in memory.

30
Q

Describe the steps involved in demand paging mechanism.

A

1.
The process attempts to access a page that is not in memory, causing a page fault.
2.
The process is suspended.
3.
The operating system takes control.
4.
The operating system locates the required page on disk (backing store).
5.
The operating system finds a free frame in memory or selects a page to be replaced.
6.
If the chosen frame is dirty (modified), it is written back to disk.
7.
The operating system initiates a disk transfer to load the required page into the free frame.
8.
While the disk transfer is in progress, the operating system may schedule another process to run.
9.
Upon completion of the disk transfer, the operating system updates the page table, setting the valid bit to 1 and the frame number to the newly allocated frame.
10.
The operating system marks the process as ready to run.
11.
The scheduler may eventually resume the process.
12.
The process restarts the faulting instruction, which now successfully accesses the required page in memory.

31
Q

What is a page replacement policy?

A

An algorithm that decides which page to remove from memory when a page fault occurs and there are no free frames available

32
Q

List some page replacement policies.

A

○ Random
○ FIFO (First-In, First-Out)
○ OPT (Optimal)
○ LRU (Least Recently Used)

33
Q

Describe the Random page replacement policy.

A

○ A page is chosen randomly for replacement.
○ Easy to implement.
○ Does not take advantage of locality.

34
Q

Describe the FIFO page replacement policy.

A

○ The oldest page in memory (the one that was loaded first) is replaced.
○ Easy to implement using a queue.
○ Fair in the sense that all pages receive equal residency time.
○ Does not consider page usage frequency, so it may replace frequently used pages.

35
Q

Describe the OPT page replacement policy.

A

○ Replaces the page that will not be used for the longest period in the future.
○ Theoretically optimal.
○ Not practically implementable because it requires knowledge of future page accesses.

36
Q

Describe the LRU page replacement policy.

A

○ Replaces the page that has not been used for the longest period.
○ Approximates OPT by assuming that past usage patterns predict future usage.
○ More complex to implement than FIFO or Random.
○ May perform poorly for certain access patterns.

37
Q

How is LRU approximated with hardware support?

A

○ A reference bit is used in the page table entry.
○ Hardware sets the reference bit to 1 when a page is accessed.
○ Periodically, the operating system reads and stores the reference bits and then resets them to 0.
○ By keeping a history of reference bits, the operating system can approximate which pages have been used recently

38
Q

How is the page to replace selected in an LRU approximation?

A

○ The page with the smallest value in its reference bit history is chosen for replacement.

39
Q

What is the modified bit in a page table entry?

A

○ A bit that indicates whether a page has been modified (dirty) since it was loaded into memory.

40
Q

What is the purpose of the modified bit?

A

○ It helps optimize page replacement by avoiding unnecessary disk writes. If a page has not been modified, it can be replaced without writing it back to disk.

41
Q

What are huge pages?

A

○ Larger page sizes, such as 2MB or 1GB, that can be used to reduce page table size and improve TLB hit rate.

42
Q

What is an inverted page table?

A

○ A page table structure that has one entry per physical frame instead of one entry per virtual page. It stores the process ID and virtual page number that is mapped to each physical frame.