Memory Hierarchy and Caching Flashcards

1
Q

what does the kernel do in the context of memory hierarchy?

A

kernel facilitates process execution via numerous abstractions

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2
Q

what abstracts functions of the cpu?

A

exceptional control flow and process management

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3
Q

what are characteristics and pros and cons of SRAM?

A

Data is stable as long as power is applied, It is complex and expensive but fast.

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4
Q

what are characteristics and pros and cons of DRAM?

A

Much denser & cheaper than SRAM
Requires period “refresh” @ 64ms

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5
Q

what are characteristics and pros and cons of NVRAM?

A

Non-Volatile-Random-Access Memory
-Data persists without power
Updates may require block erasure
- Flash has limited writes per block (100K+)

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6
Q

What process is used to cache data to SRAM?

A
  1. CPU requests data at memory address k
  2. Fetch data from DRAM (or lower)
  3. Cache data in SRAM for later use
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7
Q

What type of concern is caching?

A

Hardware level , job of Memory Unit Management.

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8
Q

what should we do when a cache collision occurs ?

A

Evict the old mapping direct mapping

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9
Q

What type of requests are usually cache requests?

A

They are read requests

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10
Q

what happens with cache on a write request?

A

It does not really need data from the memory.

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11
Q

What are the two types of write hits?

A
  1. Write through- updates memory and cache
  2. Write back: Updates cache only
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12
Q

What are the two kinds of write miss?

A
  1. Write around- updates memory only
  2. Write allocate- allocate space in cache for data then write hit
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13
Q

Which policy would require data-to-be-evicted
to be written back to memory first?

A

Write back policy

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14
Q

which policies allow the cache to absorb multiple writes to memory?

A

write- back and write allocate

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15
Q

why would you ever want write-through /
write-around?

A

to minimize cache complexity

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16
Q

what is hit time refering to?

A

time it takes to detect, hit, and return data. mostly depends on cache
complexity

17
Q

what is miss penalty referring to?

A

time to detect miss, retrieve
data, update cache, and return data. mostly depends on latency of lower level in memory hierarchy

18
Q

what constitutes cache friendly code?

A

exhibits high locality (temporal and spatial)
maximizes cache utilization
keeps working set size small
avoids random memory access patterns