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450 > Memory > Flashcards

Memory Flashcards

1
Q

Physical Memory AKA

A

RAM

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2
Q

Memory needs to be

A

subdivided

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3
Q

Memory hierarchy

A

Registers, cache, main memory, solid state disk, magnetic disk

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4
Q

Memory management is an _ task under _

A

optimization task under constraints

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5
Q

Fixed-partition Allocation divides memory into

A

Fixed-size partitions

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6
Q

Fixed-partition allocation, each partition contains

A

exactly one process

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7
Q

In fixed-partition allocation, the degree of multiprogramming is bound by

A

the number of partitions

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8
Q

In fixed-partition allocation, what happens when a process terminates

A

The partition becomes available for other processes

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9
Q

Internal Fragmentation

A

Allocated memory may be slightly larger than requested memory

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10
Q

internal fragmentation size difference

A

is memory internal to a partition but not being used

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11
Q

Variable-partition scheme (dynamic) process

A

When a process arrives, search for a hole large enough for this process

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12
Q

Variable-partition scheme (dynamic) hole definition

A

Block of available memory; holds of various size are scattered throughout memory

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13
Q

In Variable-partition scheme (dynamic), how much memory is allocated

A

Only as much memory as needed

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14
Q

in Variable-partition scheme (dynamic), what does the OS maintain information about?

A

Allocated Partitions
Free partitions (hole)

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15
Q

External Fragmentation

A

Total memory space exists to satisfy a request, but it is not contiguous

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16
Q

What could fixed-partition allocation lead to?

A

Internal Fragmentation

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17
Q

What could Variable-partition scheme (dynamic) lead to?

A

External Fragmentation

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18
Q

How to reduce External Fragmentation?

A

Compaction

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19
Q

External Fragmentation 50% rule

A

number of holes = .5 * number of occupied blocks

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20
Q

Compaction

A

Shuffle memory contents to place all free memory together in one large block

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21
Q

Compaction is only possible when? and at done when?

A

It is only possible if relocation is dynamic and is done at execution time

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22
Q

First-fit

A

Allocate the first hole that is big enough

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23
Q

Best-fit

A

Allocate the smallest hold that is big enough

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24
Q

Best fit must do what?

A

Search entire list, unless ordered by size

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25
Q

What will best-fit produce?

A

The smallest leftover hole

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26
Q

Worst-fit

A

Allocate the largest whole

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27
Q

Next-fit

A

Starts each search at the point of the last allocation (round robin)

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28
Q

What must worst-fit do?

A

Search the entire list

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29
Q

Worst-fit produces

A

The largest leftover hole

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30
Q

Which dynamic storage-allocation is fastest?

A

First-fit

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31
Q

Word

A

Fixed size unit of data, usually 4 bytes

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32
Q

Logical Address Space

A

An abstraction of physical memory, consisting of a sequence of imaginary memory locations [0: m-1]

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33
Q

Source Module

A

A program or program component written in a symbolic language like C or assembly, that must be translated by a compiler or assembler into executable machine code

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34
Q

Source Module to object module

A

Translation

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35
Q

Object module(s) to Load Module

A

Linking

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36
Q

Object Module

A

The Machine language output of a compiler or assembler from a source module.

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37
Q

Load Module

A

A program or combination of programs in a form ready to be loaded into main memory and executed

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38
Q

Load Module on disk to Load module in memory

A

Loading

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39
Q

What are system libraries

A

Load modules on disk and in memory and in execution

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40
Q

Addresses in a source program are usually

A

Symbolic

41
Q

What does a compiler do to these symbolic addresses

A

A compiler binds these symbolic addresses to relocatable addresses

42
Q

What does the linkage editor or loader do to the relocatable addresses

A

It binds the relocatable addresses to absolute addresses

43
Q

What does each binding do

A

It maps from one address space to another

44
Q

Source program address example

A

int count;

45
Q

Relocatable address example

A

100 bytes from the beginning of this module

46
Q

Each process has

A

A separate memory space

47
Q

Which two registers provide address protection between processes

A

Base Register
Limit Register

48
Q

Absolute address example

A

74014

49
Q

Memory-Management Unit (MMU)

A

Hardware Device that maps logical to physical address

50
Q

Base Register

A

Smallest legal address space

51
Q

Limit Register

A

Size of the legal range

52
Q

In MMU, what is special about the value in the relocation register (base) register?

A

It is added to every address generated by a user process at the time it is sent to memory

53
Q

Which program deals with logical addresses?

A

User Program

54
Q

Does the user program ever see the real physical address?

A

No

55
Q

What does the CPU hardware compare?

A

Every address generated in user mode with the registers

56
Q

What will an attempt to access other processes’ memory do?

A

It will be trapped and cause a fatal error

57
Q

Logical Address

A

An integer in the range [0: m-1] that identifies a word in a logical address space

58
Q

What do the compiler/assembler and linker assume the logical address space start with at load time?

A

Address 0

59
Q

Relocation

A

The act of moving a program component from one address space to another

60
Q

Static relocation

A

Binds all logical addresses to physical addresses prior to execution

61
Q

Dynamic relocation

A

Postpones the binding of a logical address to a physical address until the addressed item is accessed during execution

62
Q

Segmentation

A

Memory-management scheme that supports user view of memory

63
Q

A program is a collection of

A

segments

64
Q

two tuple in each logical address

A

<segment-number, offset>

65
Q

Segment table

A

Maps two-dimensional physical addresses

66
Q

Each table entry in segment table has

A

Base - contains the starting physical address where the segments reside in memory
limit - specifies the length of the segment

67
Q

Segment-table base register (STBR)

A

points to the segment table’s location in memory

68
Q

Segment-table length register (STLR)

A

indicates the length (limit) of the segment

69
Q

Sharing of segments

A

Share code/editor segment but have different data segment

70
Q

Can physical address space of a process be noncontiguous?

A

Yes

71
Q

[physical] frames

A

divide physical memory into fixed-size blocks

72
Q

[logical] pages

A

Divide logical memory into blocks of same size

73
Q

How to run a program of size n pages?

A

find n free frames and load program

74
Q

Paging address translation is dividing address generated by cpu into

A

Page number (p)
Page offset (d)

75
Q

Page number (p)

A

Used as an index into a page table which contains base address of each page in physical memory

76
Q

Page offset (d)

A

Combined with base address to define the physical memory address that is sent to the memory unit

77
Q

Paging

A

Noncontiguous allocation of memory

78
Q

Shared pages – shared code

A

One copy of read-only (reentrant) code shared among processes
Must appear in the same location in the logical address space of all processes

79
Q

Shared pages – private code and data

A

Each process keeps a separate copy of the code and data
Can appear anywhere in the logical address space

80
Q

Page table is kept in

A

main memory

81
Q

Page table base register (PTBR) points to

A

page table

82
Q

Page-table length register (PLTR) indicates

A

size of the page table

83
Q

What two memory accesses does the paging scheme in every data/instruction access require?

A

One for page table and one for data/instruction

84
Q

How can the two memory access problem be solved?

A

Fast lookup hardware cache called associative memory or translation lookaside buffers (TLBs)

85
Q

How big is TLB?

A

64 to 1024 entries

86
Q

What happens on TLB miss

A

Value is loaded into the TLB for faster access next time

87
Q

How to solve TLB problem when switching processes?

A

Need to flush at every context switch
Or store address-space identifiers in each TLB entry to uniquely identify each process and provide address-space protection for that process

88
Q

How much faster is TLB than memory access

A

An order of magnitude

89
Q

Hierarchical Page Tables

A

Break up the logical address space into multiple page tables

90
Q

Two-level paging: logical address is divided into

A

Page number
Page offset

91
Q

Two-level paging: Page number is divided into

A

Page table index (within the outer page directory)
Page index (within the inner page table)

92
Q

Intel IA-32 Architecture support both

A

Segmentation and segmentation with paging

93
Q

Who generates logical address?

A

CPU

94
Q

Where is selector given to?

A

Segmentation unit

95
Q

What does segmentation unit produce?

A

Linear Address

96
Q

What is linear address given to?

A

Paging unit

97
Q

What does paging unit produce?

A

Physical Address in main memory

98
Q

What can be the size of each page

A

anything of the power of 2

450 (7 decks)

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