memory Flashcards

1
Q

To protect against the meltdown attack, the kernel address space is largely hidden from user mode and an explicit address space switch takes place when entering the kernel. Explain which hardware feature can reduce the cost of this switch and how
it works.

A

The cost can be reduced by using tagged TLBs. With tagged TLBs, every address space is assigned a tag and only TLB entries with the current tag are used
for translation, thus eliminating the need to flush the TLB on kernel entries and exits

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2
Q

Which property of a forward page table determines the maximum size of the physical
address space?

A

The size of the physical address space is determined by the width of the page frame number field.

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3
Q

Linear page table

A

The virtual address space is divided into fixed-size pages, and each page table entry (PTE) maps a virtual page to a physical page frame in memory.
It is suited for systems with small or mostly filled virtual address spaces.

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4
Q

Inverted page table

A

Each entry corresponds to a physical page frame in memory and contains information such as the virtual page number and process ID that the page frame belongs to.
It makes sense when the physical address is smaller than virtual address space

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5
Q

Which three conditions must apply so that external fragmentation can occur for a set
of allocations?

A

Different allocation lifetimes
Different allocation sizes
No relocation of previous allocations

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6
Q

Name an address space segment that is never part of an ELF file

A
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7
Q

ELF File

A

Executable and Linkable Format:
text section, data section, BSS section, symbol table, relocation table, dynamic linking table

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8
Q

Explain a method for the OS to determine that a memory area has been written to when using page-based memory management on x86. Specify the accuracy with which the location, time, and number of accesses can be determined.

A

Dirty Bit on a write access, the MMU sets the dirty bit in the page table entry (PTE) of the target page. By periodically inspecting and resetting dirty bits, the OS can detect that at least one write access to a page has been taken place since the latest reset. However, it is not possible to derive the exact offset within the page, the number of accesses, or the exact point in time.

Page Faults: If the pages of the respective memory area are write protected, page faults can be used to detect write accesses. However, page faults are much more costly and single-stepping or emulation is needed to allow the attempted write access to actually be performed.This leads to excessive runtime overhead. This method provides the exact addresses, points in time, number of the accesses.

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9
Q

All elements are stored sequentially on separate 4-KiB pages in a hypothetical data structure. To sort the data structure, the virtual addresses of the elements should
be adjusted through the page tables instead of copying the elements back and forth
in memory. Discuss the advantages and disadvantages of this approach

A

+We only have to adjust two PTEs to exchange two elements in the data structure. This is especially advantageous if the elements are large and we save copy time.

-Since the respective TLB entries have to be invalidated, this method leads to a large number of TLB misses and consecutive page table walks. At the same time, page table structure caches may be less effective as the page tables have been modified.

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10
Q

Name two properties of a forward page table that determine the size of the virtual address space

A

Number of levels
Size of page
Size of PTEs

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11
Q

What happens to dynamically-allocated memory after program termination, if it has not been freed with free() before

A

The memory is automatically freed by the OS in the course of releasing the underlying memory pages

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12
Q

What is meant by Bélády’s anomaly

A

With FIFO page replacement, it is possible to construct a reference string for a number N of page frames that performs worse with N+1 frames

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13
Q

Explain for which allocation pattern it makes sense to use arena allocation. What
advantages does it offer in this case?

A

Arena allocation is suitable with peak allocation patterns, where many allocations are done without any intermediate frees. Instead, the objects are freed all at once at the end. Using area allocation in this case saves metadata as an allocation is just a pointer increment and the free just returns the whole arena in one call.

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14
Q

How are memory-mapped files basically implemented in an operating system? In
particular, explain how the consistency of the mapping is ensured in the presence of
writes from foreign processes (e.g., with the write() system call).

A

The OS loads the file into a system-wide file cache in kernel mode. Memory mappings of the file are established by mapping the same cache pages into the respective user address spaces. To guarantee consistency writes via the write() syscall are directed to the cache pages in kernel memory. The OS periodically flushes the data to the actual file on disk to keep the on-disk representation consistent (write-back cache).

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15
Q

Explain two disadvantages of simple base and limit registers compared to segment tables.

A
  • With base and limit registers all memory of a process needs to be contiguous in physical memory, as there is only one pair of registers describing the virtual address space layout. Segments tables, on the other side, can map different areas of physical memory independently.
  • Sharing memory is very difficult with base and limit registers as the memory regions have to overlap in physical memory. It becomes impossible to share memory between more than two processes without breaking isolation.
  • Base and limit registers generally do not allow to assign specific protections to certain areas of a process.
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16
Q

Why can the heap conceptually act as a stack, but not vice versa?

A

The lifetime of data in a stack frame is limited to the thread’s execution in the corresponding function.

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17
Q

Give two reasons why it makes sense to maintain CPU-local lists for recently freed memory areas in a memory allocator.

A
  • As lists are CPU-local they do not need synchronization when memory blocks are allocated from them, which allocation faster
  • The memory areas are more likely to be hot in the local CPU cache so that accesses do not cause cache misses (even for the first writes)
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18
Q

Explain the advantage of tagging in a TLB.

A

With tagging support in the TLB, the OS does not have to flush the whole TLB when an address space switch occurs. This allows (some) translations to remain cached in the TLB and reduces the TLB miss rate (and thus memory access latency) when switching between address spaces.

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19
Q

Explain for which scenarios linear and inverted page table types are suitable

A

Linear page table: It is particularly suited for systems with small or mostly filled virtual address spaces. In these cases, there is no benefit in using multiple levels for translation due to the small size and missing sparseness. Instead, the additional levels only increase translation costs and waste memory.

Inverted page table: It makes sense if the physical address space is considerably smaller than the virtual address space. This way, less memory is wasted on page tables

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20
Q

A process calls fork(). Describe for the parent and the child process, how each address space has to be configured to allow copy-on-write (COW).

A

Both, the parent and the child processes, map to the same page frames. Therefore, both address spaces need to be write-protected. This way, a write access triggers a page-fault and the OS is invoked, which can create a private copy.

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21
Q

Briefly explain the term ASID.

A

ASID is the abbreviation for address space identifier and it associates a TLB entry with an address space to avoid having to flush all TLB entries on a context switch.

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22
Q

What is the difference between a software- and a hardware-managed TLB?

A

The software-managed TLB does not walk the page table in memory on a TLB miss. Instead, the OS has to resolve the TLB miss and manually add the TLB entry.

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23
Q

Explain the terms demand paging and pre-paging. Which method is expected to use more memory? Why can this method nevertheless be advantageous?

A

With demand paging, pages are loaded into the address space only on their first access. In contrast, pre-paging loads all contents into memory at the process start. Consequently, with pre-paging, the probability is higher that more memory is used. Nevertheless, the method avoids page faults at runtime and can thus be faster.

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24
Q

Give two disadvantages of segment-based memory management compared to page-based memory management.

A
  • Segments need to be kept contiguous in physical memory.
  • Segments can only be swapped in and out as a whole.
  • Segmentation may suffer from external fragmentation.
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25
Q

An already selected heap page should be swapped out from the address space of process A and made available to process B as a free page. Explain which basic steps are necessary for this operation. Assume that the kernel has its own mapping
of the physical page.

A

(1) Invalidate user mapping in process A (unset P-bit in corresponding PTE)
(2) Flush TLB entry
(3) Write page to swap file via kernel mapping. Note offset somewhere.
(4) Clear page via kernel mapping
(5) Create new user mapping in process B (configure PTE with correct frame number and set P-bit)

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25
Q

What is meant by the term thrashing?

A

The system is under heavy memory pressure and busy swapping pages in and out.
CPU utilization is low as processes wait for pages to be fetched from secondary storage.

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26
Q

Why can the calculation of working sets be useful in thrashing?

A

The working set comprises all pages that are currently needed by a process to make progress. In situations of high memory pressure, this information can drive page replacement decisions so that less recently accessed pages are swapped out first. In critical situations, the working set can be used to select processes for suspension.

27
Q

Discuss the advantages and disadvantages of bitmaps versus singly-linked lists (one page per bit and list node) for managing free memory pages in terms of memory consumption and algorithmic complexity for allocating a page.

A

Memory consumption: The bitmap is very compact (i.e., 1 bit per page), but the list nodes for free memory can usually be placed in the free memory itself. So in this case the list can be more efficient.

Algorithmic complexity: Finding free memory in the bitmap is an O(n) operation with n being the number of pages in the system. For a singly-linked list it is O(1).

28
Q

How could memory organization and address translation be adapted in principle to save memory for sparse address spaces (no calculation necessary)? The size of the address space should remain the same.

A

The page size could be reduced while increasing the number of levels.

29
Q

Explain the term demand paging. What is the disadvantage of this method?

A

With demand paging pages in the virtual address space are actually allocated in physical memory and filled with contents only on their first access. A disadvantage is that programs may experience many page faults at startup, which might be less efficient from a performance perspective than doing pre-paging.

30
Q

To protect against the meltdown attack, the kernel address space is largely hidden from user mode and an explicit address space switch takes place when entering the kernel. Explain which hardware feature can reduce the cost of this switch and how
it works.

A

The cost can be mitigated by using tagged TLBs. With tagged TLBs, every address space is assigned a tag and only TLB entries with the current tag are used for translation, thus eliminating the need to flush the TLB on kernel entries and exits.

31
Q

Which property of a forward page table determines the maximum size of the physical address space?

A

by the width of the page frame
number field

32
Q

Which three conditions must apply so that external fragmentation can occur for a set of allocations?

A
  • Different allocation lifetimes
  • Different allocation sizes
  • No relocation of previous allocations
33
Q

Name an address space segment that is never part of an ELF file.

A
  • Heap
  • Stack
  • Dynamically created virtual memory areas
34
Q

Explain a method for the operating system to determine that a memory area has
been written to when using page-based memory management on x86. Specify the
accuracy with which the location, time, and number of accesses can be determined.

A

Dirty Bit On a write access, the MMU sets the dirty bit in the page table entry (PTE)
of the target page. By periodically inspecting and resetting dirty bits, the OS can
detect that at least one write access to a page (i.e., page granularity) has been
taken place since the last reset. However, it is not possible to derive the exact
offset within the page, the number of accesses, or the exact point in time

35
Q

In a hypothetical data structure all elements are stored sequentially on separate 4-
KiB pages. To sort the data structure, the virtual addresses of the elements should
be adjusted through the page tables instead of copying the elements back and forth
in memory. Discuss the advantages and disadvantages of this approach.

A

Pro: We only have to adjust two PTEs to exchange two elements in the data structure. This is especially advantageous if the elements are large (i.e., occupy a whole page) and we save copy time.
Con: Since the respective TLB entries have to be invalidated, this method leads to a
large number of TLB misses and consecutive page table walks. At the same time, page table structure caches may be less effective as the page tables have been modified.

36
Q

Name two properties of a forward page table that determine the size of the virtual address space.

A
  • Number of levels
  • Size of page
  • Size of PTE (i.e., number of PTEs per page)
37
Q

Name two properties of a forward page table that determine the size of the virtual address space.

A
  • Number of levels
  • Size of page
  • Size of PTE (i.e., number of PTEs per page)
38
Q

What happens to dynamically allocated memory after program termination, if it has not been freed with free() before?

A

The memory is automatically freed by the operating system in the course of releasing the underlying memory pages.

39
Q

Explain the terms external fragmentation and internal fragmentation.

A

Internal fragmentation:
If a memory manager only offers memory blocks of fixed sizes, the difference between the requested size and block size cannot be used and is called internal fragmentation.

External fragmentation:
The free space in physical memory may be too scattered to allow the allocation of a segment of a certain length, even if enough total free space is available. The sum of the currently not usable memory is called external fragmentation.

40
Q

State one way to reduce internal fragmentation when using paging and give two disadvantages which are caused by this measure.

A

Internal fragmentation can be reduced by choosing a smaller page size.
* A system with a smaller page size uses more pages so the size of the page table is increased
* The TLB reach (amount of memory that the TLB can keep track of) is reduced
* More virtual-to-physical translations are required, which leads to additional overhead
* Spatial locality might be decreased. This might decrease the performance of caches and result in higher access times when using a HDD

41
Q

Explain, why the operating system cannot choose an arbitrary format for TLB entries on a system with a software-managed TLB.

A

The TLB entry format is specified in the instruction set architecture (ISA) of the respective CPU. Even with a software-managed TLB, the TLB is a hardware component, which is specified by the cpu manufacturer. The format of the page table entries, however, can be chosen by the operating system.

42
Q

Name and explain one advantage and one disadvantage of physical tagging compared to virtual tagging.

A

+ No ambiguity (homonym problem): A virtual address might point to different physical addresses at different points in time. When using physical tags, homonyms can be detected which means that the cache does not have to be flushed at each
context switch.
+ Synonyms (multiple virtual addresses point to the same physical address) can be detected by checking all entries of the cache
+ Easy write-back. If the cache entry needs to be written back to main memory, no additional TLB lookup is required.

  • Modern systems use virtual memory abstraction. A TLB look-up is required to translate the virtual address to the physical address which is used for tagging. The virtual to physical translation takes some time and might increase the latency of the cache.
43
Q

Which coherence problem arises when using a virtually indexed, physically tagged cache?

A

Aliasing (coherence problem with synonyms). Virtual addresses that point to the same physical address might be mapped to different cache sets.

44
Q

Give two advantages and two disadvantages of page-based virtual memory compared to direct physical addressing.

A

+ Isolation (Process ↔ Process, Process ↔ Kernel)
+ Sharing (e.g., libraries)
+ Memory overcommitment can be implemented
+ Easier allocation of physical memory (i.e., fragmentation allowed)
-More complex hardware necessary (MMU + TLB)
-Higher access latency (TLB lookup, page table traverse on TLB miss)
- Context switching costs increase due to necessary TLB flushes (strictly speaking, this is only a disadvantage of operating systems with multiple virtual address spaces)
-Kernel entries become necessary as only the OS is allowed to manipulate the
address space
-More complex to implement
- Memory overhead for page tables

45
Q

What general tasks does an operating system have to perform in order to implement page-based virtual address spaces? Assume a system with a hardware-managed TLB.

A
  • Allocation / management of page tables
  • Implement a page fault handler
  • Implement page allocation, loading, and replacement
  • Implement address space switching
46
Q

What information can be used on modern systems to easily determine the working set of a process?

A

The working set is the set of pages accessed in the last delta time frame. If the hardware supplies a reference bit, the OS can periodically read and reset the bit to determine which pages have been accessed in the given scan interval.

47
Q

The first time a page is accessed in a system with demand paging, a page fault occurs. Why?

A

In a system with demand paging, pages are allocated and filled only on the first access. To detect the first access, the page is marked invalid (no access) in the page table.

48
Q

During the subsequent handling of the page fault, no free physical memory is available. Give the necessary steps to resolve the page fault without terminating processes. Explicitly state any necessary interactions with the hardware.

A
  • Find victim page
  • Invalidate user mode references to the page frame (in all page tables)
  • Write back contents, if necessary
  • Flush/invalidate entries in TLB
  • Load new contents into page frame
  • Update mapping in current page table
  • Restart instruction
49
Q

Explain the basic principle of a slab memory allocator.

A

The allocator forms a so called slab cache from one or multiple slabs, themselves being pages of contiguous physical memory. The cache is split into chunks of (fixed) equal size. Allocations can only be made with this chunk size

50
Q

For which scenario is the slab allocator particularly suited?

A

Slab allocators are commonly used for allocating (kernel) objects of the same size.
This is because, (1) the allocator effectively minimizes fragmentation, which is usually a problem with many but small allocations. And (2) by reusing freed objects some
initialization overhead may be saved

51
Q

Nowadays, data structures are often optimized to a length of 64 bytes. What is the
meaning of this number?

A

On many processors, 64 bytes is the cache line size (or a multiple thereof)

52
Q

What type of cache miss cannot occur in a fully associative cache?

A

Fully associative caches are not susceptible to conflict misses, because in a conflict miss the requested entry has previously been removed from the selected set due to capacity reasons although there was room left in other sets. As fully ssociative caches posses a single set only, conflict misses cannot occur.

53
Q

When does a process in Linux experiences a segmentation fault, also known as
access violation in Windows?

A

A segmentation fault or access violation is an exception that is raised by the operating
system if a process attempts to access a virtual address that is either not assigned
or for which the process does not posses the required access permissions

54
Q

Which operation mainly determines the speed of the fork() system call?

A

Copying the process’s address space

55
Q

Give and explain a technique that is used on modern systems to considerably increase the performance of fork().

A

Copy-on-write creates page tables that share the page frames between the parent and child processes, without having to copy the data itself. To maintain isolation the pages are marked read-only in both processes. When either process attempts to modify a page, the sharing is broken and a private writable copy of the page frame is created.

56
Q

Name the page replacement algorithm presented in the lecture which makes use of
the temporal locality of page accesses. Why is it only approximated in practice?

A

Least Recently Used (LRU) (0.5 P). LRU is usually approximated, because the page
tables are missing timestamps that are updated on each access

57
Q

The system is extended with a cache. Give two reasons why the copy performance
increases.

A
  • A cache usually consists of cache lines that are larger than a single CPU word
    (e.g., 64 bytes). Thus when reading the buffer, RAM accesses occur with larger
    width, which increases the memory access bandwidth.
  • Having a cache allows the CPU to prefetch (read-ahead) data from the source.
  • When writing to the destination the cache buffers the write accesses, thus reducing the latency for each write operation. Just like when reading, the memory
    access bandwidth increases.
58
Q

Explain the term PFN.

A

PFN is the abbreviation for Page Frame Number and denotes the index of a physical
page frame

59
Q

Which areas usually existing in the user address space of a process are not initialized
by the OS with content from a file

A

Heap (0.5 P), Stack (0.5 P), and BSS (0.5 P).

60
Q

process writes to a virtual page of such a memory area for the first time. The system
uses demand paging. Describe a way to keep the latency of the page fault low.

A

When a process accesses anonymous memory for the first time, the operating system
must (1) find a free physical page (this may include evicting other pages), and (2) clear
the page by filling it with zeros (0.5 P). The operating system can keep the latency
low, by maintaining a pool of zero pages from which the allocation can directly be
satisfied

61
Q

Explain how knowledge on the working sets of a system can be used by the OS to
avoid thrashing. Assume that LRU page replacement is used and that it shall not be
modified.

A

Thrashing occurs when the system does not have enough physical memory to satisfy
the working sets of the running processes. This causes constant swapping of pages
and severely inhibits progress. The working set of a process is the set of pages accessed during the last measurement interval and can be used as indicator for the
true memory demand of a process for the next measurement interval.
If the working sets of all running processes do not fit into memory, the operating
system may select a process with a large working set and temporally suspend it, so
other processes can make progress

62
Q

Give another advantage as well as a disadvantage of a linear page table

A

Advantage (0.5 P): Small latency and less memory accesses during translation.
Disadvantage (0.5 P): Not suited for sparse address spaces of large size due to high
memory consumption

63
Q

How is the size of the addressable physical memory determined by the page table in
the given system?

A

The physically addressable memory is only determined by the width of the PFN field
in a page table entry (

64
Q

What does the TLB reach describe? Give two ways to increase it.

A

The TLB reach describes the amount of virtual memory for which a TLB can store
translations at any point in time (1.0 P).
The TLB reach can be increased by using a larger TLB (0.5 P) or increasing the page
size (

65
Q

Does a software-managed TLB allow a custom format for page table entries? Justify
your answer.

A

Yes (0.5 P). The page table is walked in software, and that software can convert
arbitrary page table entries into the format expected by the TLB

66
Q

A program constantly allocates memory without freeing it. How can fragmentation
still occur? Give an example.

A

Whether fragmentation occurs depends on the memory allocation policy. A buddy
allocator for example produces internal fragmentation for allocations of size other
than 2
n
, irrespective of the allocation order or deallocation of memory (