Makefile Flashcards
make
‘make’ is a cmd that looks for a file named Makefile in the current working directory
Makefile contains rules, which tell make what to do
make interprets a simple Makefile rule as a script with the given target
each rule has a target: target refers to a filename in the current working directory
a Makefle can have multiple rules, each with a different target
running make name_i will execute the actions in that rule that has target name_i
running make will execute the first rule by default
Makefile Rule Structure
Rules have the following form:
target : dependency_1 ... dependency_m
action_1
action_2
....
action _N
above are tabs (not space!)
each line of the script can use standard UNIX cmds
dependencies can name other targets in the Makefile
if any dependency is old, make will try to re-make it!
the example creates a chain of dependencies: a file can depend on some files, which depend on other files, etc.
make can figure all this (dependency chain) out
“toe make the TARGET, first make all its DEPENDENCIES, then perform all the ACTIONS”
Example of general structure of Makefile rule
(1) : (2)
(3)
(2) refers to the dependency
Keywords are: ACTION MAKE ALL DEPENDENCY TARGET
valgrind : detects memory leaks, out of memory leads
GDB : C, C++ , backtraces code. Allows breaking stepping, etc. Set break points, see values of variables at certain points
JDB is for JAVA
When use one over the other?
GDB commands
break / b : sets breakpoint at specific line or method
next / n : executes the next lines of code
step / s : steps into the method being called
continue / c : executes code until the next break point (or termination)
backtrace / bt : Displays the call stack for the current thread
print / p : prints the value of a variable
next v. continue
next will take it to the next line
continue will go through ALL the code between current to the point you want to go, or finish the whole program if no breakpoints
step continues to run until it changes lien of source code
next doesn’t trace into a subroutine but rather skips over it
backtrace : prints out the stack thread or error to follow bread crumbs
When debugging, diagnosis the cause of the problem comes before reproducing it.
FALSE
Reproducing comes before diagnosis it.
Want to know what the problem is before what is causing it
step v next
are similar cmds but operate at the machine instruction level rather than source code level
next goes to the next line of code the one below it. Execute the entire function and spits out all out. So if the next line was a function call it will jsut run the entire function and give the output
step : if you want to go into that function. Allows you to see the details of a function to see how it is behaving
If the next line has a function call you want to use step. to go into the function
step is good to use to go LINE BY LINE and will act like next if not function call
The dependencies in a rule can be the names of other targets in the makefile
In the generic structure provided, actions for target_1 through target_m and THEN the actions for target_0
The actions will be performed if any of the dependencies are newer than the target
“To make the TARGET, first make all its DEPENDENCIES, then perform all the ACTIONS”
.PHONY target
A target that will always be out of date!
Will always be run
clean :
rm -rf *.class
what if there is a file called clean in the same directory?
Suffix Directive
By using a suffix directive, you can jsut write one rule that handles all the files at once
.SUFFIXES: . java .class
.java.class:
javac $<
$< : symbol means the dependency, whatever it is (like any rule, the action line must start with a tab)
Now any .class target file will be made from the corresponding .java file
Makefiles can contain macros (“variables”) which act like variables
CLASSES=A.class B.class X.class Y.class
all: $(CLASSES)
with the above running make all will compl all the .java files into .class files
