Main Memory Flashcards
This sits between main memory and CPU registers
Cache
These two registers define logical address space usable by a process
Base and limit registers
A device that maps virtual to physical addresses
Memory Management Unit
Simple Scheme
A scheme where a relocation register just adds a base value to an address
Swapping
Allowing the physical memory space of a process to exceed physical memory by temporarily moving the process to backing store before being brought back for continued execution.
Backing Store
A fast disk large enough to accommodate copies of all memory images
Roll Out / Roll In
A swapping variant for priority-based scheduling where lower priority processes are swapped out so a higher priority process can be loaded.
Solutions to Dynamic Storage-Allocation Problem
First Fit
Best Fit
Worst Fit
First Fit
Allocate the first hole big enough
Best Fit
Allocate the smallest hole big enough, must search entire list
Worst Fit
Allocate the largest hole by searching entire list
Internal Fragmentation
Occurs when allocated memory might be slightly larger than requested memory.
Physical memory is divided into fixed-size frames with a power of 2 between 512b and 16MB.
The logical memory is divided into same-size blocks called pages.
A page table is used to translate logical and physical addresses. (storing page number (p) as an index for the page table and offset (d) which is combed with the base address to find the physical memory address.)
Free-frame list is maintained to keep track of frames that are free for allocation.
External Fragmentation
When the total memory space does exist but is not contiguous and is then reduced by compaction where the free memory is relocated to be together in one block. This relocation must be dynamic.
Transition Look-aside Buffer (TLB)
A cpu cache that memory management hardware uses to improve virtual address translation speed.
Typical small , 64 - 1024 entries
On miss, value loaded to TLB for faster access next time
TLB is associative (searched in parallel)
EAT (Effective Access Time)
(1 - e) * a + (2 + e) (1 - a)
e = time unit, a = hit ratio
