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Digital Electronics > Logic Gates > Flashcards

Logic Gates Flashcards

1
Q

What symbol is generally used to represent power supply? (1)

A

VDD

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2
Q

Why has the power supply to transistors dropped as chips have progressed? (3)

A
  1. Smaller transistors are used
  2. Prevents overloading transistors
  3. Saves power
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3
Q

Describe in words how logic levels are defined using two gates. (6)

A
  1. The first gate is the driver
  2. The second gate is the receiver
  3. The output of the driver is the input to the receiver
  4. Outputs in the range VDD - VOH give logic high; VOL - GND logic low
  5. Inputs in the range VDD - VIH are interpreted as logic high; VIL - GND low. All other inputs to the receiver are forbidden
  6. VOH - VIH and VIL - VOL give the noise margins
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4
Q

Draw a diagram showing the input/output characteristics for a driver/receiver circuit. (1)

A
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5
Q

What are the DC transfer characteristics of a gate? (1)

A

A description of the output voltage as a function of the input voltage (usually shown as a graph)

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6
Q

What are the ideal transfer characteristics for an inverter? (1)

A
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7
Q

What might the realistic transfer characteristics look like for an inverter? (1)

A
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8
Q

What are unity gain points? (1)

A

Points on a transfer characteristic graph (input against output voltage) where the gradient is -1

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9
Q

Why do we choose logic levels at unity gain points? (2)

A
  1. Usually maximise noise margins
  2. e.g. reduce VIL -> small increase in VOH; increase VIL -> large drop in VOH
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10
Q

What is static discipline? (1)

A

Given logically valid inputs, every circuit element should produce logically valid outputs

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11
Q

What is a transistor? (2)

A
  1. An electrically controlled switch
  2. Turns ON/OFF when a current is applied to a control terminal
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12
Q

What are the two main types of transistor? (2)

A
  1. Bipolar transistors
  2. MOSFETs (Metal-Oxide Semiconductor Field Effect Transistors)
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13
Q

What does MOSFET stand for? (1)

A

Metal-Oxide-Semiconductor Field Effect Transistor

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14
Q

How many MOSFETs can fit on a 1cm2 silicon chip? (1)

A

Approx. 1 billion

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15
Q

What is a semiconductor? (1)

A

A material that can conduct electricity under some conditions but not others (depends on the concentration of dopants)

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16
Q

What are MOSFETs built from? (1)

A

Silicon

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17
Q

What structure does silicon form and why? (2)

A
  1. Forms a crystalline lattice structure
  2. Group IV atom so forms four covalent bonds
18
Q

Why is silicon by itself a poor conductor? (1)

A

All its electrons are tied up in covalent bonds

19
Q

What are dopant atoms? (1)

A

Impurities added to a substance to produce semiconductors

20
Q

What happens when a group V atom is added to silicon? (2)

A
  1. n-type silicon is produced
  2. There is an extra electron not involved in the bonds which is free to move
21
Q

What happens when a group III dopant is added to silicon? (2)

A
  1. p-type silicon is produced
  2. There is a missing electron called a hole (a silicon electron moves to create an ionized dopant atom and the hole can continue to “move” in this way)
22
Q

What is a diode in the context of silicon? (1)

A

The junction between the p-type and n-type diode

23
Q

What is the p-type region in a silicon semiconductor called? (1)

A

Anode

24
Q

What is the n-type region in a silicon semiconductor called? (1)

A

Cathode

25
Q

When is a semiconductor forward biased? (1)

A

Voltage on the anode > cathode so a current flows

26
Q

What is the anode in a semiconductor? (1)

A

p-type region

27
Q

What is the cathode in a semiconductor? (1)

A

n-type region

28
Q

When is a diode reverse biased? (1)

A

Voltage on cathode > anode so no current flows

29
Q

What happens at a p-n junction when no voltage is applied? (3)

A
  1. Electrons from the n-type move to fill the holes in the p-type and vice versa (diffusion current)
  2. This leaves a depletion region in the centre with no free charges (i.e. no electrons/holes) but is charged due to the dopant atoms (p 27)
  3. The depletion region creates a field that opposes the diffusion of electrons between the two types so eventually equilibrium is reached when diffusion and drift currents are balanced
30
Q

What happens during forward bias? (3)

A
  1. On the p side holes are “pushed” towards the junction where they neutralise some of the -ve charge in the depletion region
  2. On the n side electrons are “pushed” towards the junction where they neutralise some of the +ve charge in the depletion region
  3. This reduces the field of the depletion region allowing the net diffusion current to increase significantly (drift current unchanged)
31
Q

What happens during reverse bias? (5)

A
  1. In the p region holes are removed giving more -ve atoms
  2. In the n region electrons are removed giving more +ve atoms
  3. Overall the depletion region grows larger and its field increases
  4. Diffusion current is reduced; drift current is unchanged
  5. This leads to a small net drift current
32
Q

What is drift current? (1)

A

The current produced by the field in the depletion region

33
Q

What is diffusion current? (1)

A

The movement of the electrons/holes due to the difference in concentration between the two regions

34
Q

Draw a diagram of an nMOS. (1)

A
35
Q

Draw a diagram of a pMOS. (1)

A
36
Q

What happens when the gate in an nMOS transistor is 0V? (2)

A
  1. The diodes between the source/drain and p substrate are reverse biased (because the source/drain are nonnegative)
  2. Therefore there is no current flow and the transistor is OFF
37
Q

What happens when the gate in an nMOS transistor is at VDD? (3)

A
  1. An electric field is established that attracts +ve charge on the top plate and -ve charge on the bottom plate
  2. If the voltage is large enough a channel is established which is effectively n-type
  3. There is now a continuous path from source to drain so electrons can flow and the transistor is ON
38
Q

What happens in a pMOS when the gate is at 0V (source and substrate at VS)? (3)

A
  1. An electric field is created from the substrate to the gate
  2. This causes a +ve p-type layer below the gate between the two p-type wells
  3. Electrons can now move throught this p-type channel so the transistor is ON
39
Q

What happens in a pMOS when the gate is at VS (source and substrate at VS)? (2)

A
  1. Reverse biased p-n junctions are created
  2. Therefore no current can flow and the transistor is OFF
40
Q

What is a CMOS? (2)

A
  1. A complementary MOSFET
  2. Contains both nMOS and pMOS
41
Q

Why are CMOS used? (2)

A
  1. Solves stray capacitance problems of nMOS
  2. Power consumption is reduced (power only dissipated when switching)
42
Q
A

Digital Electronics (1 decks)

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