Logic and Architecture Flashcards

1
Q

What are the two ways we can interpret sequences of bits?

A

Instructions telling the computer what to do

Addresses identifying particular pieces of memory

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2
Q

Describe the Difference Engine

A
  • Designed by Babbage
  • Built 1930s
  • Aim : Compute log and trig tables
  • Programmed by setting mechanical wheels in positions
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3
Q

Describe the Colossus

A
  • Used in Bletchley Park
  • Used valves (vacuum tubes)
  • Programmed by plugboard and paper tape
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4
Q

Describe IBM 407

A
  • Accounting machine, used in 1949

- Programmed by manual writing of control panel

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5
Q

What made the EDVAC a big step for computers?

A

Same storage can be used for numbers and instructions to say what do to do with the numbers

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6
Q

State the steps in the fetch execute cycle

A
  1. Load data from memory address in ip (instruction pointer)
  2. Adjust ip to refer to next instruction
  3. Control unit decodes data as an instruction
  4. Instruction is carried out by ALU
  5. (some instructions may change ip)
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7
Q

What does the CPU consist of?

A

Registers
ALU
Control
Instruction Pointer

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8
Q

What is Instruction Set Architecture?

A

Set of instructions actually understood by the CPU (Their encodings into bits and their meanings)

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9
Q

How many implementations can a single ISA have?

A

Multiple

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10
Q

What lasts longer ISAs or CPU hardware designs?

A

ISAs

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11
Q

Describe assembly language

A

Text representation of individual instructions, very low level and totally ISA specific

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12
Q

What are some features that are present in assembly language?

A
  • Conditional branches
  • Unconditional branches
  • Labels
  • Data moves
  • Arithmetic
  • Some support for subroutines
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13
Q

What are some features that are not present in assembly language?

A
  • Loop and conditional constructs
  • Method call and return
  • Variable names
  • Data types
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14
Q

State the function of a compiler

A

Converts high level program into low level instructions for a specific machine, not usually needed at run time

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15
Q

State the function of an interpreter

A

Program that reads a high level program and carries it out. Done at run time.

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16
Q

What does a linker do?

A

Combines object code files together to make an executable program that can actually run.

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17
Q

What does a loader do?

A

Loads programs and libraries into memory to prepare them for execution.

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18
Q

What are the key issues in ISA design?

A
  • Registers
  • Operands
  • Memory addressing
  • CISC vs RISC designs
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19
Q

Describe a register

A
  • very fastest form of memory

- only form of local variable you have in assembly language

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20
Q

State some types of registers

A
  • General Purpose Registers
  • Floating Point Registers
  • Instruction Pointer
  • Flags
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21
Q

Describe General Purpose Registers

A
  • store one word and are used in integer operations
  • most versatile and common type
  • typically a small number
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22
Q

What part of the general purpose registers allows for backwards compatibility?

A

Often possible to use part of a register to access smaller units

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23
Q

What does it mean for an ISA to be orthogonal?

A

If each instruction performs a unique task without overlapping with other instructions

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24
Q

State a critical ISA design decision

A

Where arguments can come from and where results are stored to

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25
Describe register memory
- At least one argument can come straight from memory
26
Advantage of register memory
More expressive, less need to find registers to store things in
27
Describe load store (register-register) memory
- All operations work between registers | - Only data transfer operations access memory
28
Advantages of register register memory
Separation of memory access and arithmetic functions makes design simpler
29
Give an example of an operation that requires three operands
Add x to y, storing result in z
30
Give an example of an operation that requires two operands
Add x to y, changing y
31
Give an example of an operation that requires one operand
All operations modify an accumulator
32
Give an example of an operation that requires no operands
Replace the top two numbers of stack by their stack
33
Describe word addressed
One address for each word, extra info to refer to specific byte within word
34
Describe byte addressed
One address for each 8 bit byte, now standard | Lowest address in a word stands for the word
35
Big Endian
Most significant byte comes first
36
Little Endian
Least significant byte comes first
37
Describe immediate mode
- Value is specified in instruction itself | - Used for constants
38
Describe direct mode
- Value is at fixed address specified in instruction
39
Describe indirect mode
- Value is at fixed address that is in register | - Extra power relative to immediate and direct modes
40
Describe index mode
- Value is at fixed address plus index obtained from register
41
What are immediate, direct, indirect and index modes all examples of
How ISAs allow instructions to access memory
42
Benefits of Orthogonality
- Simplifies code development - More powerful instructions - Fewer instructions required to do the same thing
43
Drawbacks of Orthogonality
- Chips need to be bigger and more complex - Slower if multiple memory access done in single instruction - Longer instructions if more operands
44
What does CISC stand for
Complex Instruction Set Computer
45
Describe CISC
- No orthogonality - Lots of addressing modes desired for human programmers and adding BCD (Binary Coded Decimal) - Variable length instructions
46
What does RISC stand for
Reduced Instruction Set Computer
47
Describe RISC
- Most instructions have three operands - Many registers - Often register-register and few addressing modes
48
Benefit of RISC
More instructions done per second
49
Drawback of RISC
More instructions needed for any task
50
AX
Primary accumulator
51
BX
Base accumulator
52
CX
Counter
53
AL/AH
Low and high bytes of AX
54
SI
Source Index
55
DI
Destination Index
56
SP
Stack Pointer
57
BP
Base Pointer
58
RIP
Instruction pointer aka program counter
59
rflags
Binary flags e.g. for comparisons
60
Describe the flags register
64 bits, not available as general purpose register Individual bits reflect execution of preceeding instruction Conditional jumps executed based on these flags