Lecture 5: The Processor Flashcards
The CPU is composed of…
A control unit, an arithmetic logic unit, special purpose registers and an on-chip cache.
The 3 main processor buses and their functions:
Data bus: transfers data to or from memory.
Address bus: for selecting specific memory location.
Control bus: for deciding where to read or write.
Name the processor’s registers:
1) Accumulator
2) Program Counter
3) Memory Access Register (MAR)
4) Memory Buffer Register (MBR)
5) Instruction Register (IR)
6) Condition Code Register
7) Stack Pointer
Name the two parts of an instruction code and what they each do.
Opcode - Instruction to execute.
Operand - Loction of data to execute on.
What is a collection of instruction codes?
Instruction set.
What is the “Fetch-Execute Cycle”? Explain the steps involved in a
Fetch-Execute cycle.
- Fetch the next instruction from memory into an Instruction Register (IR).
- Increment the Program Counter (PC) register to point to the next
instruction. - Determine the type of the instruction just fetched.
- If the instruction uses data stored in memory, fetch the data, into internal
CPU registers. - Execute the instruction.
- Store the result in the appropriate place.
- GOTO step 1.
What is a better register alternative to that of the simple accumulator architecture?
General Purpose Register (GPR).
Pros of General Purpose Registers.
Longer instructions, faster, more efficient for compilers and each register can be used as a separate accumulator.
Which special purpose register keeps track of where data will be accessed when pushing or popping?
Stack Pointer.
How does pipelining work?
Structuring instructions to be executed in parallel so as to increase efficiency.
Name the two interface types for I/O devices to communicate with CPU.
Memory-mapped and instruction-based.
Name the three ways a processor can control I/O device data. Explain them.
Programmed I/O, Interrupt-driven I/O & Direct Memory Access.
