Lecture 10: Communications protocols Flashcards

1
Q

What does USART stand for?

A

Universal Synchronous and Asynchronous Receiver and Transmitter

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2
Q

What is USART?

A

It is a highly flexible transmission device. It has a configurable transmission speed and data format with error checking.

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3
Q

In a USART, how do we implement 0 and 1?

A

using different voltages that depend on the connector standard.

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4
Q

What is the BAUD rate?

A

It is the speed of transmission and represents the number of bits sent per second.

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5
Q

How do we connect two USARTS?

A

Connect the transmitter of one device to the receiver of the other and vice versa.

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6
Q

What is a frame?

A

It is how we send data. One frame will contain the data bits to be generated along with bits to start and stop transmission. There is an optional parity bit for error checking.

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7
Q

What happens when one frame has been transmitted?

A

We can transmit a new frame or we can send the line into an idle state.

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8
Q

What is the value of the start bit?

A

Low

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9
Q

What is the value of the stop bit?

A

High

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10
Q

What happens if our parity bit does not match the computed bit?

A

This means that the data is incorrect and it will be discarded.

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11
Q

How does the Parity bit work?

A

We add it to the end of our data bits to make the number of High bits even or odd.

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12
Q

How do we calculate the Parity bit?

A

Through the XOR of all the data bits.

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13
Q

What is the location of the Parity bit?

A

between the last data bit and the stop transmission bit.

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14
Q

What are the 5 steps for transmission?

A
Set the idle bit to high.
Set the start bit to low
Set the bits according to the data being sent
Set the Parity bit
Set the stop bit to high/
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15
Q

What happens when we activate USART transmission?

A

The normal port operation is overridden and the function is given to the transmitters serial output.

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16
Q

How do we initiate data transmission?

A

We load the transmission register with the data to be sent.
Move the data to a shift register when it is ready to send a new frame.
Once complete the frame will be transferred at the set clock rate.

17
Q

When will the receiver begin to receive data?

A

When it recognises a valid start bit

18
Q

What happens to the received data?

A

It will be received at the baud rate and transferred into a shift register.

19
Q

What are the 3 interrupts of the receiver?

A

Frame Error: This will detect out of sync conditions
Data Overrun: Indicates loss of data because the receiver is full
Parity Error: The Parity bit does not match

20
Q

What happens if we have incorrect baud rates between devices?

A

Then we will not correctly transmit the data and end up with weird results.

21
Q

What are the four clock modes that we can use for generation and transmission?

A

Normal or double speed asynchronous

Master | Slave synchronous

22
Q

What does SPI stand for?

A

Serial Peripheral Interface

23
Q

What is SPI?

A

It allows for high speed data transfer between the ATMega8 and its peripherals.

24
Q

How many data registers does the SPI consist of?

A

2 shift registers and a clock generator.

25
Q

How do we initiate the communication cycle?

A

The Master will pull low the slave select pin on the desired slave. Both Master and Slave will then begin to prepare the data for transmission in their respective registers and the Master will generate the required clock pulses.

26
Q

What is the MOSI line?

A

It is the Master Out Slave In line and is the line that data is always shifted on for data going from the Master to the Slave

27
Q

What is the MISO line?

A

It is the Master In Slave Out line and data from the Slave to the Master will transmit along this line.

28
Q

What happens between the Master and Slave after each data packet is sent?

A

The master will synchronise the slave by pulling high its ss bit.

29
Q

What is TWI interface?

A

It is a Two Wire serial interface that is suited for microcontroller programs.

30
Q

How many devices can we connect on the TWI Line?

A

128 as it has a 7 bit address space.

31
Q

What external hardware do we need for the TWI?

A

An external pull up resistor for each of the bus lines.