Lecture 1 Chapter 1 Flashcards

1
Q

What are the 4 parts of a computer

A

CPU RAM IO and BUS

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2
Q

What does the ALU do

A

Carries out basic arithmetic and logical operations

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3
Q

What does the CU control unit do

A

Determines the sequence of operations

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4
Q

What are registers

A

Small memory in the CPU for immediate data and results

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5
Q

What does the Program counter PC register hold

A

The address of the next instruction to be executed

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6
Q

What does the Instruction register IR hold

A

Holds the current instruction data

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7
Q

What does the Accumulator AC hold

A

Partial results of any computation

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8
Q

What does the Memory Address register hold MAR

A

Holds the address of the current instruction or data

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9
Q

What does the memory Buffer data register hold MBR

A

Hold the current data or instruction

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10
Q

What does the I/O address register hold? I/O AR

A

The address of the I/O device

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11
Q

What does the I/O buffer register hold
I/O BR

A

Data from the I/O devices

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12
Q

What do the first 4 bits of the Instruction hold

A

The Opcode (instruction to be performed)

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13
Q

What do the last 12 bits of the instruction contain?

A

The address of the operation

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14
Q

What are the two stages of the instruction cycle?

A

Fetch and Execute

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15
Q

What are the three types of Instructions?

A

CPU arithmetic or logical operation
Communication with memory
Communication with I/O devices

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16
Q

What is the process required for a single instruction called?

A

The instruction cycle

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17
Q

What happens to the PC during instruction cycle

A

It is incremented at each fetch

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18
Q

Processor

A

Controls Computer Operation, preforms data processing functions

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19
Q

User -visible

A

basic type of register, available to all programs, can be referenced by a user/programmers instruction set

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20
Q

Control and Status

A

Basic type of register, used by CPU to control execution of programs

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21
Q

MAR

A

register for processor to exchange data with memory, specifies the next address is memory for next read or write

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22
Q

MBR

A

register containing data to be written to memory, or data from memory

23
Q

IO AR

A

register with the address of a particular I/O device

24
Q

IO BR

A

Register for exchange of data between IO and processor

25
Main Memory
Stores data and programs, volitaile, contains a set of locations with addresses, each location contains a bit pattern interpreted as instruction or data
26
IO modules
move data between computer and external environment, contains internal buffers for storing data for sending
27
System BUS
Communication pipeline between components
28
What does a program consist of
Instructions stored in memory to be executed by the processor
29
Why would program execution stop?
If processor turns off, an error occurs, or an instruction to halt is received.
30
What are the four categories of instructions?
CPU-MEM CPU-IO Data Processing Control
31
What is a control instruction?
An instruction that specifies a change to the sequence of execution
32
What is a Data Processing instruction?
The processor will preform an arithmetic or logical operation on data
33
What is a processor - IO instruction?
Data will be transferred between processor and IO module
34
What is a Processor -Memory Instruction?
Data is transferred between the processor and memory
35
What is an Interrupt?
mechanism by which modules interrupt normal sequence of the processor
36
What are the four classes of interrupts?
Program, Timer, IO, Hardware Failure
37
What is a program interrupt?
generated by a condition occurring as a result of instruction execution (arithmetic overflow, division by zero, attempt to execute an illegal machine instruction, reference outside a user's allow memory space)
38
What is a timer interrupt?
generated by timer within processor, allows operating system to perform certain functions on a regular basis
39
What is an I/O interrupt?
generated by I/O controller, to signal normal completion of an operation or variety of error conditions`
40
What is a hardware failure interrupt?
generated by a failure (power/memory parity error)
41
Why are interrupts needed?
Primarily to improve processor utilization
42
What is an interrupt stage?
A stage added to the instruction cycle to accomodate interrupt handling
43
What is the interrupt handler routine?
A process preformed when an interrupt is found during interrupt stage, OS determines nature of interrupt and preforms actions needed.
44
What are the two ways to handle multiple interrupts?
Disable interrupts, priority
45
What are the constraints on computer memory?
1. decreasing cost per bit 2. increasing capacity 3. increasing access time 4. decreasing frequency of access to memory by processor
46
What is the memory hierarchy
Smaller, faster, expensive memories are supplemented by larger, cheaper, slower memories
47
What is locality of reference?
- During program execution, memory references by processor (for both instructions and data) tend to cluster - possible to organize data across hierarchy so that percentage of accesses to each subsequently lower level is much less than that of level above
48
What is a cache?
- high-speed, smaller, extends main memory - stages data movement between main memory and processor registers for performance improvement
49
What are the key elements of cache design?
- cache size - block size - mapping function - replacement algorithm - write policy - number of cache levels
50
What are the three IO operation techniques?
Programmed, interrupt driven and DMA
51
How does programmed IO work?
The processor periodically checks status of I/O module
52
How does Interrupt driven I/O work?
I/O module will send interrupt when ready for service
53
How does DMA driven I/O work
DMA module will use cycle staling to directly communicate with memory
54