L18 & L19 Flashcards

1
Q

How do single core implement speculation? What about multi-core?

A

Speculation in single core:
- Out-of-order execution
 If speculation results in incorrect state, rollback state and repeat

  • Branch prediction: make a guess about the condition based on previous executions of the branch
     If speculation results in incorrect state, rollback state and repeat
  • Value prediction

Speculation in multi-core:
- Thread level speculation: In loops, assume parallel execution and assign each iteration to a core
 If sequential, rollback the iterations

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2
Q

What are the possible illegal access in TLS? How are they dealt with?

A

Illegal accesses in TLS: are identified after their occurence
 Violate write after read dependence
 Violate read after write dependence

To prevent illegal access assign each access to a state:
- States:
* S = speculatively loaded
* M = modified
* SM = speculative loaded and modified
* N = not accessed
- Notify higher threads when write is executed
- If they are S or SM, rollback to pre-speculated state

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3
Q

What are the 3 types of TLS?

A

Loop-based TLS: divides a loop into chunks executed by threads

Method/procedure based TLS: speculatively execute multiple threads of execution within a method

Arbitrary point TLS: fork-join directives in code mark speculative regions

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4
Q

What can be used to transform loops that cannot be parallelized?

A

Polyhedral transformations

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5
Q

Match the three versions for polyhedral transformations in TLS:

A. Original
B. Instrumental
C. Parallel pattern

A serial
B TLS version of an abstract representation of a loop
C serial + tracking memory accesses

A

A A
B C
C B

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6
Q

What are some causes for TLS overheads? How can they be reduced?

A

TLS Overheads:
* Duplicate shared data
* Track reads and writes
* Check status of lower threads when reading and higher threads when writing
* Commit

Reducing overheads:
* Value forwarding
* Value prediction for return value of method
* Partial commits
* Caches as speculative data buffers

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7
Q

What is a benefit of TLS?

A

Little programmer effort

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8
Q

What are transactions used for?

A

Widely used to control sharing of some resources

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9
Q

What are the 4 transactions properties? Which ones relate to transactional memory?

A

Properties: atomicity, consistency, isolation and durability

Transactional memory properties:
* Atomicity: all or nothing behaviour
* Isolation: transactions do not leak information

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10
Q

What happens when a transaction is successful? What about a failed transaction?

A

If successful, writes become visible and execution continues

If unsuccessful, writes are discarded and transaction restarts

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11
Q

How does transactional memory ensure atomicty and isolation?

A

Versioning and conflict detection

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12
Q

What is eager versioning and lazy versioning in transactional memory?

A

Versioning: reject speculative writes if transaction fails

Eager:
o Update value itself
o Restore original value if fails
o Very fast commit but very slow abort

Lazy:
o Update a private version
o Copy the private version to shared variable if successful
o Slow commit but fast abort

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13
Q

What is eager conflict detection and lazy conflict detection in transactional memory?

A

Conflict detection: violating atomicity or isolation

Eager validation:
o Reads and writes to shared variables
o If fails, abort and restart
o Causes delay in progress

Lazy validation:
o Wait until the transaction commits to check for conflict
o Always progresses

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14
Q

How are the following transactional memory functionalities achieved through hardware support:
 Read-write set
 Transmit R/W notifications
 Receive R/W notifications
 Private copies

A

 Read-write set -> read/write tag bits
 Transmit R/W notifications -> coherency actions
 Receive R/W notifications -> bus snooping
 Private copies -> dirty cache lines

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15
Q

What is an example of Hardware transactional memory?

A

Load-linked – store conditional
* Readset is the locked address register
* If conflict, reset load linked flag
* If no conflict, commit

Cache-based TM:
* Cache as readset + writeset + write buffer
* Transactional write uses invalidate broadcast

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16
Q

What is a hybrid transactional memory implementation?

A

HTM for small transactions

STM for larger ones