IPC and Synchronization Flashcards
What are the two types of IPC?
Message-based and shared memory based
What is message based IPC?
Send/recv messages between two processes. OS is responsible for maintain. (-) user-kernel boundary crossing
What is shared memory based IPC?
OS creates a buffer in physical memory and then maps that memory into each process space
Types of message-based IPC?
Pipes (stream of bytes) and queues (sockets, queue of messages)
What is a spinlock?
Lock that spins while it is waiting. Another tasks cannot be scheduled on the CPU while it is waiting, but it can be preempted
What is a semaphore?
Generalized version of a mutex, has counter. On lock, if counter > 0, it will decrement and proceed. Increments when it leaves critical section
What is a monitor?
Higher-level synchronization mechanism that is equivalent to a mutex + condition variable. Ex. Java synchronization keyword
What hardware guarantees are there for special multi-step instructions used by lock implementations?
- Atomic (either fully executes or not at all)
- Mutually exclusive - only one thread at a time
- Multiple requests will be queued
What is cache coherence?
Each CPU has its own cache, so if you update a value on one cache, the others must be updated as well
What is NCC architecture
Non-cache coherent. Coherence must be handled by software
What is CC arch?
Cache-coherent. Done by hardware.
What is write-invalidate?
Cache coherence mechanism that invalidates a cache’s value
What is write-update?
Cache coherence mechanism that updates a cache’s value when it has been changed elsewhere
How to atomic operations achieve cache consistency?
They skip the cache and read directly from main memory
