IO organization Flashcards
Input/Output Subsystem
It handles all the input and output operations of the computer system.
Peripheral Devices
Input or output devices that are connected to computer are called peripheral devices
types of peripherals
Input devices: they allow user input, from the outside world into the computer. Examples: keyboard, mouse, speech recognition, sensor, etc.
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Output devices: they allow information output, from the computer to the outside world. Examples: printer, monitor (display unit), speaker, etc.
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Auxiliary storage devices: these are used for permanent storage of data. Examples: magnetic tape, magnetic disk, optical disk, flash drive
Input/Output Interface
Input/Output Interface provides a method for transferring information between internal system (CPU) and external I/O devices (peripheral devices)
Significance of I/O Interface
1.Peripherals are electromechanical and electromagnetic devices and their manner of operation is different from the operation of the CPU and memory, which are electronic devices.
2.The data transfer rate of peripherals is usually slower than that of the CPU, and consequently, a synchronization mechanism may be needed.
3.Data codes and formats (bytes) in peripherals differ from the word formats in the CPU and memory.
what does the IO bus consist of
data lines, address lines, and control lines.
functions of interface
a)
decodes the device address
b)
decodes the commands from the processor
c)
provides signals for the peripheral controller
d)
synchronizes the data flow and supervises the transfer rate between peripheral and CPU or memory
Types of commands that an interface may receive
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Control command – is used to activate the peripheral and inform it on what to do
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Status command – is used to test various conditions in the interface and peripheral
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Data output command – causes the interface to respond by transferring data from the bus into one of its registers
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Data input command – is the opposite of the data output command. In this case, the interface receives data from the peripheral and places it in its register
Device Controllers
Device Controllers are components on the motherboard (or on an expansion card) that acts as an interface between the CPU and the actual device
Interrupt Request (IR)
When a device needs to access the CPU, the device controller issues an Interrupt Request (IR) to the CPU in order for the CPU to stop the current task and start communicating with the peripheral device
functions of device controllers
It handles the data flow between the processor and the device it is connected to.
It translates signals from the device into the format that can be understood by the CPU, and vice-versa.
It buffers data being sent between the device and the CPU.
The device Controller also performs synchronization and error detection
Examples of Device Controllers
Keyboard Controller – controls the keyboard
DMA Controller – controls Direct Memory Access
Network Adaptor Controller – controls Network Interface Card (network adapter)
IDE Controller – controls hard disk and CD/DVD drive
Graphics Adapter Controller – controls video output devices such as monitor, projector
USB Controller – controls devices connected by USB
Ways that the computer buses can be used by CPU to communicate with memory and I/O
1.
Use of two separate buses, one for memory and the other for I/O. In this method, all data, address and control lines would be separate for memory and I/O. Both I/O and memory have different sets of address spaces and instructions but require more buses.
2.
Use of one common bus for both memory and I/O but with separate control lines for each. This configuration is called Isolated I/O.
3.
Use of one common bus for both memory and I/O with a common control line. This configuration is called Memory mapped I/O.
Memory mapped I/O and Isolated I/O.
methods to perform input/output operations between the CPU and peripheral devices in the computer
Memory-mapped I/O
Isolated I/O
When the CPU fetching or transferring an I/O data, it places the address associated with the data on the common address lines. At the same time, it enables the I/O read (for input) or I/O write (for output) control line. This informs the components connected to the common bus that the address in the address line is for an I/O register and not for a memory word
Input/Output Processor
is a processor separate from the CPU designed to handle only I/O operations
Asynchronous Data Transfer
the two units are said to be asynchronous to each other, and if data transfer occurs between them, this data transfer
Synchronous Data Transfer
It is when transfer between two units registers in the I/O interface share a common clock with CPU registers
Modes of I/O Data Transfer
- Programmed I/O
- Interrupt Initiated I/O
- Direct Memory Access.
method used is to disable the buses
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Bus Request (BR) – it is used by the DMA controller to request the CPU to relinquish the control of the buses.
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Bus Grant (BG) – it is activated by the CPU to inform the DMA controller that the buses are in a high impedance state and the requesting DMA controller can take control of the buses. Once the DMA has taken the control of the buses, it transfers the data
Bus Arbitration
Bus arbitration is the process of resolving conflicts that arise when multiple devices attempt to access the bus at the same time
Applications of bus arbitration in computer organization
Shared Memory Systems: Bus arbitration allows multiple devices to access the memory without interfering with each other.
Multi-Processor Systems: Bus arbitration allows multiple processors to share access to the bus to communicate with each other and with shared memory.
Input /Output Devices: Bus arbitration allows multiple input/output devices to share access to the bus to communicate with the processor and memory.
bus
is a connected common communication pathway
Bus master
Is a device that can transfer data on the bus at the same time
Approaches to bus arbitration
centralized arbitration, a single
device (arbiter) is responsible for performing the required arbitration
distributed arbitration, all devices compete for access to the
bus by sending a request signal and waiting for a grant signal
