Introductory concept Flashcards

1
Q

logic levels

A

The voltage level used to represent 1s and 0s are called logic levels.

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2
Q

Digital Waveform

A

Series of pulses.

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3
Q

Pulse

A

It consists of leading(rise time: :10% to 90% amplitude) n trailing edge(fall time : 90% to 10% amplitude). Pulse width is between 50%s od both edges. They can be +ve going or -ve going.

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4
Q

Duty Cycle

A

(Pulse width/time period)*100%

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5
Q

The clock

A

in digital systems, each waveform is synchronized with a basic timing waveform CLOCK. Periodic it is.
Its time period is the time for one bit. and doesn’t carry information. During one period, information waveform is either high(1) or low(0).

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6
Q

Timing diagrams

A

A graph of digital waveforms to give the time relationship between them.

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7
Q

USB

A

Universal Serial Bus

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8
Q

Data Transfer

A
  1. Serial Transfer

2. Parallel Transfer.

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9
Q

Serial Transfer

A

Pro:
Requires only One line.
Con:
Requires time proportional to the data amt.

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10
Q

Parallel transfer.

A

Pro:
requires one time interval only.
Con:
Requires multiple lines.

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11
Q

Logic Gate

A

A circuit which performs specified logic function (and, or).
ALU consists of many such logic gates.

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12
Q

Inverter

A

The logic circuit of not function. inverting the input.

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13
Q

Comparator

A

The comparison function. A logic gate that performs magnitude comparison. a box with 2 input lines (magnitude a and b ) and 3 output lines ( a>b, a<b></b>

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14
Q

Adder

A

An adder

adds two binary numbers (on inputs A and B with a carry input Cin) and generates a sum and a carry output (Cout).

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15
Q

Subtractor. ( logic circuit)

A

A subtracter requires three inputs: 2 numbers and a borrow input. 2 outputs :difference, borrow output.
(An adder can do this as its special case of addition)

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16
Q

Multiplier

A

multiplied 2 at a time so 2 input, 1 output product(partial). The circuit can consist of adders in conjugation +some stuff.

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17
Q

Division, divider.

A

Division can be performed with a series of subtractions, comparisons, and shifts, and thus it
can also be done using an adder in conjunction with other circuits.
Two inputs.
output: quotient and the remainder.

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18
Q

Code conversion function.

A

conversion between binary and other codes such as the binary coded decimal (BCD) and the Gray code.

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19
Q

Code

A

A code is a set of bits arranged in a unique pattern and used to represent specified information

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20
Q

Encoder

A

one certain type of encoder converts each of the
decimal digits, 0 - 9, to a binary code. A HIGH level on the input ( 10 input lines for 10 chars) produces logic levels that represent the proper binary code on the
output lines.

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21
Q

Decoder

A

example, displays with seven segments( when all segments lit they show 8 ). Input of binary and appropriate output lines are activated and light the proper segments to display the decimal
digit corresponding to the binary code.

22
Q

The Data Selection Function

A

Consists of Multiplexer (mux) and demultiplexer (demux).Multiplexing and demultiplexing are used when data from several sources are to be
transmitted over one line to a distant location and redistributed to several destinations.

23
Q

Mux n demux

A

a logic circuit that switches digital data from several input lines onto a single output line in a specified time sequence is mux and demux is its opposite.

24
Q

time-division multiplexing

A

during the first time interval, input A data go to output D. During the second time interval, input B data go to output E. During the third time interval, input C
data go to output F.
After this, the sequence repeats. Because the time is divided up among several sources and destinations where each has its turn to send and receive data, this process is called time-division multiplexing (TDM)

25
Q

who uses what for memory in a computer?

to retain binary data for a period of time.

A

Rom n ram n small caches: Semiconductor.
Registers: Semiconductor flip flops.
Hard drives: Optomagnetic disk

26
Q

Flip Flop

A

Bistable ( two stable states), store one bit. high output means stored 1.

27
Q

Register

A

Made of multiple flip flops to store multiple bits.
Shift registers: Shift the bits.
that can be parallelly ( ppl sitting in roller coaster) or serially ( ppl entering bus).

28
Q

Counters

A

Their basic purpose is to count events represented by changing levels or pulses. To count, the counter must “remember” the present number, hence storage req and flip flops used.

29
Q

A process control system.

A

Recall the system for bottling vitamin tablets.

30
Q

What is a programable logic device?

A

A programable logic device has an undefined function at the time of manufacture.

31
Q

Pros of PLDs and fixed-function logic?

A

PLDs:
1. Allows us to rewrite function without replacing components.
2. Faster and cheaper implementation.
3. Less board space.
Fixed Function Logic:
- to implement a small segment of logic it may more efficient to use fixed-function logic.

32
Q

Categories of Programmable logic:

A
  1. Field Programmable Gate Array.
  2. PLD’s
    a. Simple PLD
    b. Complex PLD.
33
Q

SPLD:

A

Generally, an SPLD can replace up to ten fixed-function ICs and their interconnections. Pins: 24-28.
Two categories:
1. Programmable Array Logic: one time programmed, has programmable array of and gates and a fixed array of or gates.
2. Generic Array Logic: reprogrammable as has a reprogrammable array of and gate + a fixed array of OR gates with programmable outputs.

34
Q

CPLD:

A

Made of multiple SPLD. Pins: 44-160.
It consists of logic array blocks (labs), programmable interconnection array (PIA). there can be from 2-64 LABs. 1 LAB almost is 1 SPLD.

35
Q

(PQFP)

A

Typical CPLD plastic quad flat packages (PQFP)

36
Q

Chip density

A

amount of circuitry that could be put on a chip.

37
Q

Field Programmable Gate Array Basic elements?

A

It has logic blocks (not as complex as LABs) (10s of 1000s) and programmable interconnection and Input/Output Blocks. and maybe memory and additional resources.
EX: FPGA ball-grid array package.

38
Q

FPGA architecture classification based on logic blocks.

A

If logic blocks are simple then FPGA architecture is called fine-grained, if larger then coarse-grained.

39
Q

FPGA input/output blocks elaboration, n programmable interconnection:

A

The I/O blocks are on the outer
edges of the structure and provide individually selectable input, output, or bidirectional
access to the outside world.
The distributed programmable interconnection matrix provides for interconnection of the logic blocks and connection to inputs and outputs.

40
Q

Microcontroller:

A

A microcontroller is basically a special-purpose small computer. Microcontrollers are
generally used for embedded system applications. An embedded system is a system that is
designed to perform one or a few dedicated functions within a larger system.

41
Q

Microcontroller, compare it with PLD.

A

The internal circuitry is fixed and its operations are determined by a program ( series of instruction ) (language C or Basic ) to perform a specific operation.
The internal circuitry of a PLD is programmed into it, and once programmed, the circuitry performs required operations.In a PLD a program determines the logic function.

42
Q

Fixed Function logic:

A

In fixed-function

logic devices, the logic functions are set by the manufacturer and cannot be altered.

43
Q
Integrated circuit (IC) packages are classified according to the way they are mounted on
printed circuit boards (PCBs) , they are:
A

through-hole mounted or surface mounted

44
Q

through-hole type packages:

A

These have pins (leads) that are inserted through holes in the PCB and can be soldered to conductors on the opposite side. EX: dual in-line package (DIP)

45
Q

Surface mounting

A
  • space-saving.
  • The pins of surface-mounted packages are soldered directly to conductors on one side of the board, leaving the other side free for additional circuits and these pins placed closer.
    Ex:small-outline integrated circuit (SOIC)
46
Q

SMT, SSOP

A

-leads of the SSOP (shrink small-outline package) are formed into a “gull-wing” shape.

47
Q

SMT,PLCC

A

-The leads of the PLCC (plastic-leaded chip carrier) are turned under the package in a J-type shape.

48
Q

SMT,LCC

A

-LCC (leadless ceramic chip) has metal contacts molded into its ceramic body.

49
Q

LQFP,SMT

A

-The LQFP (low-profile quad flat package) also has gull-wing leads.

50
Q

CSP, FBGA : SMT

A

-Both the CSP (chip scale package) and the FBGA (fine-pitch ball grid array) have contacts embedded in the bottom of the package.

51
Q

Pin Numbering

A

-pin 1 is indicated by an identifier that can be either a small dot, a notch, or a bevelled edge.
-On right or opp of pin 1 is the pin with the highest count.
- Starting with pin 1, the pin numbers increase as you
go down, then across and up
-The pin numbers
increase going counterclockwise as viewed from the top of the package

52
Q

Complexity Classifications for Fixed-Function ICs

A

The complexity figures stated here for SSI ( x =0, y = 10),
MSI(10,100), LSI(100,10000), VLSI(10,000-100,000), and ULSI (>100,000)
-from x to y equivalent gates on a chip. They include logic functions such as encoders, decoders,
counters, registers, multiplexers, arithmetic circuits, small memories, and others.