Introduction to ES Flashcards
1
Q
What are ES?
A
Integrated computing system performing a limited set of well-defined control, regulation, and data processing tasks within a higher-level system
-> electronic system that contains at least one controlling device
2
Q
ES: Resource Constrained
A
- Constraints can be at hardware level:
-> CPU running at lower frequencies to consume less power and save battery energy
-> Less memory for cheaper manufacturing costs
-> Supporting a subset of peripherals - Creates the need for new security solutions
3
Q
ES: Requirements
A
- Act deterministically or in real-time
- Be fault tolerant with graceful degradation
-> fault tolerance: continues to function correctly in the presence of faults or errors
-> graceful degradation: safely degrades performance or functionality when errors are encountered
4
Q
Microcontroller Components
A
- CPU
- Coprocessors
- MMU
- Memories
- Other components related to clock and power management
5
Q
Microcontroller Components: MMU
A
- Memory Management Unit
- Hardware component that performs virtual memory management (virtual address to physical address mapping), memory isolation in multi-tasking scenarios
-> MPU: trimmed down version of MMU, only access control for memory regions used by different applications. Isolates memory regions used by individual applications running on the CPU.
6
Q
Microcontroller Components: ROM/PROM
A
- Read-only-memory: immutable, cannot be changed after manufacturing (content is programmed into ROM during manufacturing)
- Programmable ROM: Content is programmed for one time only after manufacturing (can be fabricated using fuses)
7
Q
Microcontroller Components: RAM & Flash
A
- Random Access Memory: volatile memory, loses content when power supply is off
- Flash or Electrically Erasable Programmable ROM (EEPROM): non-volatile, does not lose its content when power supply is off, content can be erased and reprogrammed many times
8
Q
Layers of ES
A
- Two different types of systems:
-> Baremetal (whole functionality included in the application): Hardware + Application
-> Full-featured (Known software layers exist): Hardware, Firmware (fest implementierte Software), Loader (loads programs into memory or maps addresses), OS, Applications
9
Q
Integrity Verification
A
- Ensures that the system is in the expected state
- Ensure that the system is in the expected state
- System state is defined by the contents of its memory
- Ensure integrity by verifying memory contents
-> make memory immutable (ROM)
-> check memory contents
10
Q
Check memory contents
A
- Small code in ROM verifies the contents of flash memory
-> Code in ROM is started
-> Code calculates checksum of the contents of flash memory
-> Checksum is compared with a known reference value - Based on this principle one can build schemes for secure and authenticated boot
11
Q
Secure Boot
A
- Ensures the system is started into the expected state
- First element is the Root of Trust for Measurement (RTM) or Trust Anchor
-> is executed on each system startup
-> cannot be verified
-> is trusted
-> trust in secure boot is based on the trust in RTM - Each component verifies its successor
-> If the successor is in the expected, it’s executed
-> otherwise the boot process is aborted
12
Q
Authenticated Boot
A
- Enables the verification of the initial system state
-> external verifier decides on the integrity of the system requirements
-> Integrity and authenticity of measurements - Each boot component measures its successor but does not verify it
-> checksums of all boot components represent the system state right after the completion of the boot process
13
Q
Remote Attestation Requirements
A
- Authentication of Prover
-> Authentication must be done by trusted component of the prover
-> trusted component has exclusive access to key (creates HASH-MAC) - Freshness of Attestation
-> Verifier challenges prover on every attestation to ensure freshness - Integrity of Attestation
-> the complete state must be attested
-> State must not change while attested
14
Q
Microcontroller Components: CPU
A
- Instruction set
- Architecture (ARM, x86, …)
- Bit-width
- Processing power
15
Q
Adversary and Trust Model
A
- Prover-Verifier interaction:
-> Prover reports its state to the verifier
-> State refers to the content of memory
-> It is represented via a HASH of the memory content
-> The verifier checks it against the known and expected state
-> The state HASH is stored locally for verification - Adversary and Trust Model:
-> Trust: Typically, a small trusted component (trust anchor) exists on the prover
-> Adversary: Typically, only software attacks are considered