Interrupts Flashcards
Who generates External/Asynchronous interrupts?
Triggered by devices external to the core’s compute circuitry
• “Asynchronous” because they can occur at any time
• (“between CPU operations”)
Who generates Internal/synchronous interrupts?
Triggered by the core’s compute circuitry (CPU instructions)
– Well, actually, it’s the software that runs on the core…
– Which is why such interrupts are also sometimes called
» “Software interrupts”
• (“while a CPU operation occurs”)
How interrupts handled in x86/linux?
Each interrupt is associated with a
– Number (called “interrupt vector”)
• There are 256 interrupt vectors, numbered 0…255
– Handling routine (called “interrupt handler”)
When the interrupt handler array is set up?
Array content is initially set by BIOS
• (For example, to be able to use keyboard before OS is up)
– Later, at boot time, array is reinitiated by OS with its own routines
What’s the routine for interrupt handling?
The interrupt handler
– Save state of currently running process P
– Execute handler
– Return to user mode, resuming either P or another process
What are the two interrupt handling contexts? (synchronous and asynchronous )
If asynchronous interrupts, kernel is said to be in “interrupt context”
• It doesn’t directly serve the process that has just been stopped
– If synchronous, kernel is in “process context”
• It needs to provide some service to the process that invoked it
(whether explicitly or implicitly)
Are interrupts a schedulable entity?
No. interrupts are handled at the moment they are fired, even if what’s currently running is “more important”.
What happens to masked interrupts?
If interrupt vector K should fire but is masked
x86 HW remembers at most 2 instances of K (the rest get lost, if exist)
Handling an interrupt might take a long time
But we want to allow OS to decide if it has more important stuff to do.
What can we do?
Solution: split the handler into two:
– Fast/Hard/First‐Level Interrupt handler (FLIH)
• What we must do when receiving an interrupt, and nothing else
• Not interruptible => as small and as quick as possible
– Slow/Soft/Second‐Level interrupt handler(SLIH)
• All the rest (lower priority)
• Interruptible; will be executed later by some kernel thread
Give an example of top half and bottom half splitting of an interrupt.
When receiving a packet from the network.
Possible top half
(not schedulable, occurs immediately)
• Put a pointer to the received packet in a queue for later processing
• Give the NIC (network card) a new free memory buffer, such that it will have room
to save subsequent incoming packets
Possible bottom half
(will happen later when the scheduler decides)
• Hand packet to network stack
• Copy the content of the packet to the memory space of the
corresponding user application
• Notify the user app that a new packet has arrived
Resume an interrupted process - where?
If asynchronous interrupt (external) or system call (synchronous=internal, explicit)
then in the next process instruction, Right after the last instruction that was executed.
If exception (synchronous=internal, implicit) – Resume in the same instruction that the HW failed to execute - and send a signal (in case we e.g. divided by 0, no sense in executing the same command).
Interrupt handling in multicores – where?
Internal=synchronous interrupts (system call, divide by 0, …)
– Each core handles on its own
External=async interrupts (generated by external devices)
– Can do static partition of interrupts between cores
• E.g., all interrupts go to core 0
• Or, all interrupts in range x–y go to core j
– Can do dynamic partition of interrupts between cores
• E.g., round robin
• Or, send interrupt to least loaded core
What’s polling?
Polling is an alternative to interrupt-based processing
– OS turns off interrupts and instead polls the NIC every once in a while
– Effective when OS is mostly busy handling the packets
(used when OS is overwhelmed by interrupts).
What are the cons of polling?
- Polling too frequently might waste CPU cycles if not enough packets
- Polling too infrequently increases latency & may result in packet loss
What’s Interrupt coalescing?
When the HW joins several interrupts of the same type in order to not overwhelm the OS.
Or by SW if it detects an interrupt storm.