Interconnection Flashcards

1
Q

Interconnection structure (Memory)

A

-N words equal length

-Unique numerical address

-Read/Write data word

-Operation is indicated by read and write control signals

-The location for the operation is specified by an address

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1
Q

Interconnection structure

A

-Computer as a network of basic modules
-Paths for connecting the modules
-Structure depends on the exchanges

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2
Q

Interconnection structure (I/O)

A

-Similar to Memory (internal point of view): read/write

-Control more than one external device (port - unique address)

-External data path (input/output)
with an external device

-Interrupt signals (?!)

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3
Q

Interconnection structure (Processor)

A

-Reading instruction and data

-Write out data after processing

-Use control signals to control the overall operations

-Receive interrupt signals

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4
Q

Interconnection structure (types of transfers)

A

-Memory to Processor: The processor reads an instruction or a unit of data from memory.

-Processor to Memory: The processor writes a unit of data to memory

-I/O to Processor: The processor reads data from an I/O device via an I/O module.

-Processor to I/O: The processor sends data to the I/O device.

-I/O to or from Memory: I/O module is allowed to ex- change data directly with memory, without going through the processor, using direct memory access.

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5
Q

Other Interconnection structure

A

-Bus Interconnection
-Point to Point Interconnection

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6
Q

Bus Interconnection

A
  • Communication pathway connecting two or more devices
  • Key characteristics: shared transmission medium

-Multiple devices connect to the bus, and a signal transmitted by any one device is available for reception by all other devices attached to the bus

-Signal overlap and become garble —> Only one device at a time can successfully transmit

-A bus consist of multiple communication pathways, lines - each transmit signals representing binary 0 or 1 (e.g. 8-bit unit of data —-> transmit over 8 bus lines)

-System Bus

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7
Q

Bus Structure - Functional Groups

A

Data lines: to provide a path for moving data among system modules

Address lines: to designate the source or destination of the data on the data bus

Control lines: to control the access to and the use of the data and address lines

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8
Q

Data lines

A

-Moving data

-Data Bus

-Bus Width - Number of lines

-Data bus width - Key factor in determining overall system performance

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9
Q

Address lines

A

-Source/destination of the data on data bus - Address Bus

-Bus width - Determines the maximum possible memory capacity

-Address I/O ports

-Higher order bits - select module

-Lower order bits - memory
location or I/O port

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10
Q

Function Groups

A

-Control the access and the use of the data and address bus.

-Control signals:
–Command signals: Specify operation to be performed
–Timing Signals: Validity of data and address information

-Control lines include: Memory write & read, I/O write & read.

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11
Q

Bus Operation

A

-If one module wishes to send data to another:
–Obtain the use of the bus
–Transfer the data via the bus

If one module wishes to request data from another module
–Obtain the use of the bus
–Transfer a request to other module over the appropriate control and address lines

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12
Q

Point-to-point Interconnection

A

-Contemporary systems increasingly rely on Point-to-point interconnect

-Bus system problem

-Lower latency, higher data rate, better scalability

-QuickPath Interconnect (QPI - 2008)
–Multiple Direct Connections
–Layered Protocol Architecture
–Packetized Data Transfer

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13
Q
A
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