INPUT/OUTPUT

Question 1

OS I/O refers to

Answer 1

communication between the system and the outside world.

Question 2

I/O devices are categorised as

Answer 2

storage, communications and user-interface.

Question 3

A human-readable I/O device is

Answer 3

suitable for communicating with the computer user

Question 4

A machine-readable I/O device is suitable for

Answer 4

communicating with electronic equipment.

Question 5

A communication I/O device is suitable for

Answer 5

communicating with remote devices

Question 6

With programmed I/O, the processor issues

Answer 6

an I/O command on behalf of a process to an I/O module. That process waits for the operation to be completed before proceeding.

Question 7

With interrupt-driven I/O, the processor issues

Answer 7

an I/O command on behalf of a process.

Question 8

With Direct Memory Access, a

Answer 8

dedicated module controls the exchange of data between main memory and an I/O module.

Question 9

Interrupts allow

Answer 9

devices to notify the CPU when they have data to transfer or when an operation is complete.

Question 10

Interrupts allow the CPU to

Answer 10

perform other duties when no I/O transfers need its immediate attention.

Question 11

The requirements of interrupts are complicated by the needs of modern I/O:

Answer 11

1. The need to defer interrupt handling during critical processing
2. The need to determine which interrupt handler to invoke, without having to poll all devices to see which one needs attention
3. The need for multi-level interrupts so the system can differentiate between high and low priority interrupts for proper response

Question 12

Direct Memory Access is achieved

Answer 12

using a special processor which offloads the work of the main CPU.

Question 13

With DMA, a special control unit is used to

Answer 13

transfer a block of data directly between an external device and the main memory, without intervention by the processor

Question 14

When the I/O operation is delegated to the DMA module

Answer 14

the processor continues with other work.

Question 15

The DMA module transfers the entire block of data to or from memory, without going through the processor.

Answer 15

When the transfer is complete, the DMA module sends an interrupt signal to the processor. The processor is therefore involved only at the beginning and the end of the transfer.

Question 16

The DMA mechanism can be configured so

Answer 16

that all modules share the same system bus. This configuration is inefficient and inexpensive.

Question 17

The DMA mechanism can be configured so

Answer 17

that there is a path between the DMA module and one or more I/O modules that does not include the system bus

Question 18

The DMA mechanism can be configured so

Answer 18

that I/O modules are connected to the DMA module using an I/O bus.

Question 19

Polling describes the

Answer 19

activity of sampling the status of an external device by a client program. Polling can be fast and efficient if both the device and the controller are fast and if there is significant data to transfer. It becomes inefficient however, if the host must wait a long time waiting for the device, or if frequent checks need to be made for data that is infrequently there

Question 20

The hierarchical design philosophy is

Answer 20

that OS functions should be separated according to their functionality. This leads to an organisation of the OS into a series of layers. Each layer performs a related subset of the functions required of the OS. It relies on the next lower layer to perform more primitive functions and to conceal the details of those functions. It provides services to the next higher layer.

Question 21

The layers are defined and organised so

Answer 21

that changes in one layer do not require changes in other layers.