ILP: Instruction Level Parallelism Flashcards
If you had an ideal processor (it can execute an infinite number of instructions in parallel, just can’t time travel), what would prevent it from achieving a CPI of ZERO?
RAW dependencies (read after write)!
The only way to read a register after it has been written to is to wait for the writing to complete. There’s no way to forward this value within the same cycle.
Why are false dependencies also called “name” dependencies?
Because the dependency is caused by the fact that two values have to write to the register (i.e., they share a name). If we could sort out this naming problem (make sure the last value is assigned to the register), there’s nothing else stopping us from executing these instructions in parallel!
Why would we duplicate register values?
This is one way of eliminating false dependencies. We actually record multiple values for each register, then the instruction that requires that register has to search through all values stored there to find the one from the most recent instruction.
However, this is complicated.
What is register renaming?
Register renaming is a better solution to the problem of false dependencies. We separate architectural registers (used by programmer and compiler) from physical registers and store values to available physical registers. We then rename registers to correspond to the correct physical register.
We keep track of this using the Register Allocation Table (RAT). This maps a physical register to the architectural register for which it is holding a value.
What is ILP (instruction level parallelism)?
ILP is the IPC (instructions per cycle) when we have an ideal processor that only has to obey true (RAW) dependencies. i.e., it’s a metric of parallelism that abstracts away the pipeline and any restrictions on the number of instructions it can handle per cycle.
Alternately, ILP is the IPC when:
- Processor does entire instruction in 1 cycle (abstracts away the pipeline)
- Processor can do any number of instructions per cycle, only restricted by true dependencies
What is ILP a property of?
It’s a property of a program, NOT a processor
How do you calculate the ILP of a program?
1) Rename registers
2) Then calculate how many instructions per cycle it would take to execute
Or, instead of renaming, just ignore all dependencies except for RAW!
What is are structural dependencies? Do they affect ILP?
This is when we don’t “have enough hardware to do things in the same cycle”, i.e., a resource conflict.
This has no affect on ILP because ILP does not consider the underlying hardware.
What are control dependencies? Do they affect ILP?
Branching!
We assume that branches are all perfectly predicted, so no, these do not affect ILP.
ILP vs IPC
ILP: IPC given an ideal out-of-order processor
ILP >= IPC
When a processor is “narrow issue” (can only fetch/decode a couple instructions at a time), this is usually the limit on performance. Even if it’s out of order.
When a processor is “wide issue”, in-order is going to be more of an issue.
Ideally, we would like a real processor that is wide issue and out of order. That will get us closer to ILP.
