I2C Flashcards
What are the two wires in I2C?
> SDA (Data)
> SCL (Clock)
How long is a packet?
8 bits
How is each bit transferred over SDA?
On a clock edge
What is the start sequence?
SDA goes low while SCL goes high
What is the stop sequence?
SDA goes high while SCL goes low
What is the general structure for a 1-byte tranaction?
[Picture2]
How does the receiver acknowlege a bit has been recieved?
By holding the SDA line LOW for one clock cycle
How long is an I2C address?
7-bits
What is the 8th bit when an address is being sent?
The direction. 0 = writing 1 = reading e.g. AAAAAAA1
What is the process for reading from a slave?
- Master transmits slave address with write direction
- The slave acknowleges the by holding the line low for one clock cycle
- The master transmits the register the slave must transmit
- the master continues to clock the SCL allowing the data to be recieved by the master
- The master sends a stop condition after the 8-bits have been recieved
What type of architecture is I2C?
Master-slave
How many slaves can be connected to an I2C bus?
2^7 - 1 = 127
What is address 0 on an I2C bus?
Used to address all slaves
What can also limit the number of slaves on an I2C bus?
Number of devices is limited by capacitive loading of the lines
What makes I2C more robust than UART?
Because it has acknowlegments