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CPSC 355 > High-Level Architecture > Flashcards

High-Level Architecture Flashcards

1
Q

A basic computer system consists of what? (6)

A
  • CPU
  • System Clock
  • Primary Memory (RAM)
  • Secondary Memory (SSD or HDD)
  • Peripheral I/O Devices
  • Bus
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2
Q

Computer System Elements Diagram

A

Check Notes

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3
Q

What does the CPU do?

A
  • Executes instructions (i.e. a program)

- Controls the transfer of data across the bus

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4
Q

Where is the CPU contained?

A

On a single microprocessor chip

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5
Q

3 Main Parts of a CPU

A
  • Control Unit (CU)
  • Arithmetic Logic Unit (ALU)
  • Registers
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6
Q

What does the CU do?

A

The CU directs the execution of instructions

  • Loads an opcode from Primary Memory into Instruction Register (IR)
  • Decodes the opcode to identify the operation
  • If needed, transfers data between PM and Registers
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7
Q

What does the ALU do?

A

The ALU performs arithmetic and logical operations on data stored in registers

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8
Q

What are Registers?

A

They are binary storage units in the CPU

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9
Q

What may Registers contain?

A
  • Data
  • Addresses
  • Instructions
  • Status Information
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10
Q

What are General-purpose Registers used for?

A

To temporarily hold data and addresses

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11
Q

What does the Program Counter (PC) contain?

A

It contains the address in memory of the currently executing instruction

It is incremented to execute the next instruction

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12
Q

What does the Status Register (SR) contain?

A

It contains information (flags) about the result of a previous instruction (e.g. overflow or carry)

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13
Q

What does the System Clock do?

A

It generates a clock signal to synchronize the CPU and other clocked devices

  • It is a square wave at a particular frequency
  • Device coordinate on the rising or falling edges
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14
Q

Features of Primary Memory?

A
  • RAM (any byte in memory can be accessed directly if you know its address)
  • Can be written to and read from
  • Is volatile (Data disappears when powered off)
  • Is used to store program instructions and data (variables)
  • Consists of a sequence of addressable memory locations (each location is typically one byte long)
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15
Q

Two architectures and features

A
  • In a VON NEUMANN ARCHITECTURE, RAM contains both data and programs
  • In a HARVARD ARCHITECTURE, it uses separate memories for data and programs
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16
Q

What is the Bus and what does it do?

A

The Bus is a set of parallel data/signal lines

It is used to transfer information between computer components

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17
Q

The bus is subdivided into what?

A
  • Address Bus
  • Data Bus
  • Control Bus
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18
Q

What does the Address Bus do?

A

The Address Bus specifies memory location in RAM

or sometimes a memory-mapped I/O device

19
Q

What is the Data Bus used for?

A

The Data Bus is used for bidirectional data transfer

20
Q

What is the Control Bus used for?

A

The Control Bus is used to control or monitor devices connected to the Bus

e.g. read/write signal for RAM

21
Q

Features of Secondary Memory?

Usage?
Volatility?
Embodied on?

A
  • Is used to hold a computer’s file system (Stores files containing program or data)
  • Is non-volatile read/write memory (Its contents persist through power cycle)
  • Usually embodied on a HDD or SSD
22
Q

What do Peripheral I/O Devices do?

A

They allow communication between the computer and the external environment

e.g. I/O devices are HDD, Modem

23
Q

Basic CPU Architectures Diagram

A

Check Notes

24
Q

Explaining the Basic CPU Architecture Diagram

A
  • Operands for an instruction come from the Accumulator Register (ACC) and from a single location in RAM
  • ALU results are always put into the ACC
  • Only Load and Store instructions can access RAM
  • Other instructions operate on Specified Registers in Register file, not on RAM (b/c registers are more quickly access than RAM, so faster)
25
Q

What is a Typical Program Sequence?

A
  • Load registers from memory
  • Execute an instruction using 2 source registers, putting result into destination register
  • Store the result back into memory
26
Q

What does the RISC Architecture stand for?

A

RISC: Reduced Instruction Set Computer

27
Q

RISC: Instruction Cycles?

Size of instructions - what does it allow for?

A

~ Uses only simple instruction that can be executed in one machine cycle

  • Enables faster clock rates -> faster execution
  • Makes Programs More larger

~ Machine instructions are always the same size

  • Makes decoding simpler and faster
28
Q

What size are ARMv8 Instructions

A

ARMv8 instructions are always 32 bits wide

29
Q

What does CISC Architecture stand for?

A

CISC: Complex Instruction Set Computer

30
Q

CISC: Instruction Cycles?

Size of instructions?

A

~ May have instructions that take many cycles to execute

  • Provided for programmer convenience
  • Slows down overall execution speed

~ Machine instructions vary in length and may be followed by “immediate” data

  • Makes decoding difficult and slow
31
Q

Another name for Instruction Cycle?

A

Fetch-execute or fetch-decode-execute cycle

32
Q

Process of Instruction Cycle?

A

The CPU executes each instruction in a series of small steps

  1. Fetch the next instruction from memory into the IR
    (PC has addresses)
  2. Increments PC to point to next instruction
  3. Decodes instruction
  4. If instruction uses an operand in RAM, calculate its address
  5. Fetch the operand

(4/5 repeat)

  1. Execute instruction
  2. If instruction produces a result stored in RAM, calculate its address

(6/7 repeat)

  1. Store the result
33
Q

ALP: What do Assembly Language Programs have?

A

Consist of a series of statements, each corresponding to a machine instruction

34
Q

ALP: Each Statement has what?

A

An Opcode, and a variable number of Operands

add (opcode) x20, x20, x21 (operands)

35
Q

ALP: How are instructions stored?

A

Seuqentially - each instruction statement has a unique address

36
Q

ALP: What does a label do?

A

It can prefix a statement, and is a symbol whose value is the address of the machine instruction

Can be used as a target for a Branch Instruction

start: add x20, x20, x21

37
Q

ALP: What are Pseudo-ops?

A

Pseudo-ops (assembler directives) do not generate machine instructions but give assembler extra information

e.g.

.global start

38
Q

ALP: What do comments do?

A

May be appended to the end of a statment

e. g.
start: add x20, x20, x21 //add term

39
Q

ALP: Format of line of code

A

label | | opcode | | operands | | comments |

40
Q

What do Assemblers do?

Give a type

A

Assemblers translate assembly source code into machine code

GNU for this course

41
Q

Code instructions to assemble ARMv8 source code?

A

gcc myprog.s -o myprog

gcc invokes the assembler as, then links the code, producing an executable called “myprog”

Assumes files ending with .s have assembly source code

42
Q

What are Macro Processors?

What is Macro Expansion?

A

Many assemblers support macros

  • Allow to define a piece of text with a macro name (Optionally, parameters can be specified)
  • This text will be substituted inline wherever invoked (macro expansion)
  • Provided as a convenience to help make code more readable?
43
Q

gcc support for macros code

A
  • We use m4 before invoking gcc which is a standard UNIX (Linux) Command to expand macros

CPSC 355 (11 decks)

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