Hardware Architecture Flashcards
Explain Pipelining
Combines multiples Fetch and Execute steps into one process.
Explain Interrupts
Hardware interrupt that stops the current CPU process and begins a new processing request.
Explain RISC CPU design
Reduced Instruction Set Computer
Uses reduced set of simpler instructions
used in ARM (small devices)
Explain ALU
Arithmetic Logic Unit
performs mathematical calculations
Explain Control Unit
Feeds instructions to the ALU
Explain CISC CPU design
Complex Instruction Set Computer
Uses large set of complex machine language instructions.
used in x86 (large computers)
Explain Computer Bus
Primary communication channel on a computer system between CPU, memory, I/O devices.
Northbridge: On top, Memory Controller Hub, connects CPU to RAM, fast
Southbridge: On bottom, I/O Controller Hub, connects I/O devices, slow
Explain Multitasking
Multiple tasks to run simultaneously on one CPU
Explain Fetch and Execute
Four steps: Fetch Instruction Decode Instruction Execute Instruction Write result
Explain Processes
Executable program loaded and running in memory
Made up of tasks and threads
Explain Multiprocessing
Multiple processes on multiple CPUs