Hardware and Circuits Flashcards
What is an ADDER
a circuit which carries out all four rules of binary addition.
Made by wiring two half- adders together and adding a third input as well as an OR gate.
what is a HALF ADDER
only carries out the first three rules of binary addition (no carry bit).
XOR gate - sum
AND gate - carry
What is a flip- flop
a “bi- stable” circuit (has 2 stable states)
used to hold a single bit in memory
D - type flip - flop
Holds a signal - typically an input signal. It releases the signal when the clock pulse comes by.
what are the types of inputs and how are they used to plot outputs
Inputs: Data signal and Clock signal
Plot the data level (high or low) at the rising clock signal, and join these to give the output signal.
Which three Components of the Processor are involved in the FDE cycle
RAM
CU
ALU
the CU and ALU are both within the CPU
How are signals passed between the RAM, CU and ALU
Using the Adress bus, Data bus and Control bus
What are Buses?
Communication channels that link parts of the CPU
What is Parallel transmission and where is it used?
Bits are sent together along parallel channels. THis is faster but requires extra space.
Used within the CPU
What is serial Transmission and when is it used?
Bits are sent one after the other, this is slower
Used by USB to connect two devices
Address Bus
Sends adress of a memory location to RAM during fetch and save operations
Data Bus
Sends data and instructions to and from ram during fetch and save operations
Control bus
Sends control signals from the CU telling other parts of the computer what to do
Registers
Small areas of high speed memory within the CPU
What does the PC/ Program Counter do
- Counts through the lines of the program, storing the address of the next instruction + copying it to the MAR
- Increments by one each cycle
- Can be overwritten using branch commands
MAR
stores the address for fetching or saving data
MDR
stores the data/instructions being fetched or saved. It acts as a buffer as instructions are copied to the CIR
CIR
takes the instruction code from the MDR to be decoded.
Summarise the Fetch phase in terms of processor components
Data and instructions go from the RAM to the CU
Summarise the Decode phase in terms of processor components
The CU turns the code into a control signal which is sent to the ALU
Summarise the Execute phase in terms of processor components
the ALU carries out the command
Describe the Fetch phase of the FDE Cycle
-The address of the next instruction is copied from the PC to the MAR
- A read signal is sent via control bus
-the contents of the MAR are sent accross the address bus to RAM
- the instruction held at that address is copied to the MDR by the data bus. Simultaneously, the PC increments by 1.
- The contents of the MDR are copied to the CIR
Describe the decode phase of the FDE cycle
- within the CIR, the instruction is split into an operator and operand
- it is decoded and turned into a control signal, which is sent from the CU to the ALU via control bus
Describe the Execute phase of the FDE cycle
- The appropriate instruction is carried out on the operand in the ALU
- The result is stored in the accumulator.
How is the result of an operation saved?
The ALU copies the result to RAM
How are data and instructions stored in Von Neuman Architecture?
Together in RAM as binary numbers
How are data and instructions stored in Harvard Architecture?
RAM is split into 2 partitions for data and instructions to be stored seperately