Hardware Flashcards

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1
Q

What is the purpose of RISC ?

What is the purpose of CISC ?

A

Reduced Instruction Set Computer, it is used by developers who want the emphasis to be on the software and instruction sets to be used aiming for faster execution times.

Complex Instruction Set Computer, it is by developers who want the emphasis to be on the hardware being used. The hardware should be chosen to suit the high-level language development

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2
Q

What is a RISC processor ?

A
  • It uses simple fixed length instructions
  • Each instruction requires only one clock cycle
  • It uses many registers
  • It makes use of pipelining
  • It has a hardwired control unit
  • It uses RAM
  • Emphasis is on software
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3
Q

What is a CISC processor ?

A
  • It uses many instruction formats and has variable length
    instructions.
  • Instructions may require multiple clock cycles
  • It uses few registers
  • It makes use of different addressing modes
  • It has a large instruction set
  • It requires complex circuits
  • It frequently uses cache memory
  • It has a programmable control unit
  • Emphasis is on hardware
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4
Q

What are the differences between RISC and CISC processors ?

A
  • RISC has fewer instructions
  • RISC has more registers
  • RISC instructions take one clock cycle
  • RISC has a hardwired control unit
  • RISC uses simple instructions
  • RISC instructions are fixed length
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5
Q

What are the five stages of pipelining ?

A

IF, Instruction Fetch cycle
ID, Instruction Decode cycle
OF, Operand Fetch cycle
IE, Instruction Execution cycle
WB, Writeback Result Process

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6
Q

What is pipelining ?

A

Each instruction is divided into 5 stages

  • It allows several instructions to be processed simultaneously thus increasing the number of instructions completed per unit time
  • Each instruction stage is completed during one clock cycle
  • No two instructions can execute the same stage of instruction at one clock cycle
  • While one instruction is being decoded another one can be fetched

Give example of how it goes cycle by cycle

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7
Q

What is a SISD system ?

A

Single instruction single data,

A single processor executes the instruction using a single data set.

  • One processor, one memory unit and one control unit that execute the instructions sequentially.
  • Does not support parallel processing, and so doesn’t support pipelining either
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8
Q

What is a SIMD system ?

A

Singe instruction multiple data,

Many processors execute the same instruction using different data sets.

Makes use of parallel processing so can use pipelining

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9
Q

What is a MISD system ?

A

Multiple instruction single data,

Many processors executing different instructions but using the same data set

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10
Q

What is a MIMD system ?

A

Multiple instruction multiple data,

Many processors executing different instructions using different data sets

All processors work independently

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11
Q

What is a massively parallel computer ?

A

It is when a large number of processors/separate computers work together collaboratively and simultaneously on the same program while communicating through a messaging interface

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12
Q

What are the characteristics of massively parallel computers ?

A
  • A large number of computer processors/separate computers connected together working simultaneously and collaboratively
  • Communicating through a messaging interface
  • Network infrastructure
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13
Q

What is the purpose of a flip-flop

A

To store a binary digit

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14
Q

What is the role of flip-flops in a computer ?

A

They are electrical components with two states, they are data storage elements used to store 1 bit of data.

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15
Q

What is the difference between an SR and JK flip flop ?

A
  • SR has an undefined state where as JK is stable
  • JK has a clock pulse
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16
Q

Why is the JK flip flop an improvement ?

A

The SR flip flop has an invalid combination, the JK flip flop does not allow this.

The JK flip flop also incorporates a clock pulse for synchronization to prevent the inputs from arriving at different times

17
Q

Advantages of using Karnaugh maps

A
  • It minimizes the number of boolean expressions
  • So, the circuit is more efficient since the minimum number of logic gates are being used