Grade 11 Unit 1: Hardware Flashcards
How was communication between North and Southbridge done?
Through the PCI Bus
What was the PCI Bus’ bandwidth?
132 MB/s
What was the problem with the method of communication between the North and Southbridge?
The available bandwidth was shared between all PCI devices and all devices linked to Southbridge (particularly HDDs) so when high-performance HDDs and video cards were launched, a bottleneck situation arose
What was the solution to the problem of the bottleneck arising with the PCI bus inter-bridge architecture for video cards?
The AGP
Expand AGP
Accelerated graphics port
Is the AGP connected to the North or Southbridge?
Northbridge
What inter-bridge architecture is used today?
There is now a dedicated high-speed connection between the North and Southbridge (FSB) and all PCI devices connect to the Southbridge
PCI Express lanes can be found on both the North and Southbridge? True or False?
True
How fast did the first Intel chipsets using the modern architecture run?
266 MB/s
What is half-duplex?
Only one channel can transmit at a time
Were the first Intel chipsets using the modern architecture half or full-duplex?
Half-duplex
Expand DMI
Direct Media Interface
How fast does a current generation FSB run?
266 MHz to 400 MHz
What are the effective running speeds of current generation FSBs?
1066 to 1600 MHz
How fast can the HyperTransport Bus operate?
200 MHz to 3.2 GHz