gates + transistors Flashcards
When will an AND gate output a logic high (1)?
when all inputs are logic high (1)
When will an OR gate output a logic high (1)?
when either of the inputs are logic high (1)
How many rows will a truth table have if a logic gate has 3 inputs?
8
What is the logic of a NAND gate?
an AND + NOT gate together
What is the logic of an OR gate?
an OR + NOT gate together
What does an equation using the property of absorption look like?
x * (x + y) = x
x * x + x * y
x + x * y
x (1 + y)
x (1)
x
What are the two De Morgan’s Laws?
!A + !B = !(AB)
!A!B = !(A + B)
How does an XOR gate work?
a(XOR)b = a’b + ab’
the output is 1 if odd number of inputs are 1
and 0 if even number of inputs are 1
What is the procedure for the Sum of Products (SOP)?
- Find the rows with the “1” output
- Write the product-form expression for the inputs in that row (A’=inverted, A=normal)
- Combine the products in step 2 into a sum (OR gate the results)
What is the procedure for the Product of Sums (POS)?
- Find the rows with the “0” output
- Write the sum-form expression for the inputs in that row (A = normal (0), A’ = inverted (1))
- Combine the sums in step 2 into a product and AND the results
What 3 terminals does a transistor have?
source, drain, gate
How does a transistor react when a voltage is applied?
If a voltage is applied to the gate, current can flow from source to drain. otherwise, the switch is off
What happens to NMOS and PMOS when a 1 (voltage) is applied at the gate?
NMOS doesn’t let the voltage through, but PMOS does
What happens to NMOS and PMOS when a 0 (voltage) is applied at the gate?
PMOS is closed off, but NMOS lets the voltage through
what is the difference between a node and a terminal?
a node is a term affiliated with the entire network, but terminal is only associated with a specific element
what are the technical terms for power source and ground in a digital circuit?
power source - vdd
ground - gnd
How would you form a NOT gate inverter using PMOS and NMOS transistors?
place the PMOS on top of the NMOS, make a wire connection between the two, and connect the vdd through the top of the PMOS and connect the gnd through the bottom of the NMOS transistor.
How would you form an AND gate using PMOS and NMOS transistors?
connect a NAND gate and a NOT gate to make and. use a branch system to connect two PMOS transistors side by side and a wire joining them in the middle, and then two NMOS transistors stacked on top of each other connected to one GND. and then stem a NOT gate from the center of the NAND gate.
How would you form an OR gate using PMOS and NMOS transistors?
stack two PMOS transistors on top of each other with one vdd coming out the top, then connect to a branch of two NMOS transistors side by side with two gnds. then stem to a NOT gate.
what is the difference between a “branch” on the bottom of the gate vs the top?
A “branch” on top is the pull up network (PUN) pulling the voltage towards the vdd (NAND) and the “branch” on the bottom is called the pull down network (PDN) pulling the voltage towards the gnd (NOR)
What is a basic explanation of a 2-way multiplexer?
the output is equal to one of two inputs, based on a selector
Explain a two to four decoder
When the selectors are certain values (00, 01, 10, 11), it will allow a specific data input with its value to pass through. n inputs, 2^n outputs
what is lithography used for?
it is needed to create source/drain/gate
what is a binary to 1 hot decoder
converts a symbol from binary code to a one-hot code
