Fundamentals of Computer Organisation & Architecture

Question 1

Addressable memory

Answer 1

The concept of storing data and instructions in a memory with discrete, unique addresses.

Question 2

Address bus

Answer 2

A bus that carries the memory location address of the register the data is being carried to or from

Question 3

Control bus

Answer 3

A part of the CPU that controls and manages the execution of instructions. It sends control signals to coordinate execution and controls Fetch-Decode-Execute cycles and buses.

Question 4

Data Bus

Answer 4

A bi-directional bus carrying data and instructions between the processor and memory.

Question 5

Harvard Architecture

Answer 5

A computer architecture that stores data and instructions in separate memories to allow the next instruction to be read while data is currently being read or written.

Question 6

I/O controllers

Answer 6

A interface that allows the processor to communicate with Input/Output devices connected to the computer

Question 7

Main Memory

Answer 7

A data store for instructions for the processor that can be directly accessed by the processor.

Question 8

Processor

Answer 8

A complex chip of transistors capable of executing programs computing data to the outputs and supervising the operation of a computer system

Question 9

Von Neumann

Answer 9

A computer architecture where a single control unit manages program control via linear sequence of fetch-execute-decode cycles. Data and instructions are held in the same memory.

Question 10

Stored Program Concept

Answer 10

Machine code instructions stored in main memory are fetched and executed serially by a processor that performs arithmetic and logical operations.