FSM Flashcards

1
Q

what does an FSM need to have

A
  1. set of states
  2. sets of inputs and outputs
  3. sets of transition states
  4. initial state
  5. Set of actions/outputs
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2
Q

key quaility about state transitions

A

need to be deterministic

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3
Q

2 key rules for conditions for transitions

A

only one conditions should be true, one condition must be true

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4
Q

how can u verify transition properties with boolean algebra

A
  • Only one condition true (AND of each pair is always 0)* One condition true (OR of all transitions is always 1
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5
Q

How to implement FSM as sequential circuit?

A

use controller architecture
state register to store the current state
combinational logic to compute outputs, next state

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6
Q

go over the laser time example

A
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7
Q

whats the 5 step controller design

A

1.capture FSM
2.Create the standard architechture by using state register and combinational logic
3. Encode the states, assign a unique binary number to a state,
4. truth table
5. implement

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8
Q

what is an encoding

A

each binary number that represents a state

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9
Q

What is the importance of the initial state in an FSM?

A

The initial state ensures predictable behavior as the FSM starts its operation from a known state.

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10
Q

How can an initial state be achieved in an FSM?

A

By using flip-flops with reset/set inputs to initialize them to a specific state (e.g., 00). Flip-Flops are basic building blocks of digital circuits that can store one bit of data. They are used in FSMs to hold the current state. Each flip-flop can represent a binary state (0 or 1).

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11
Q

based on flip flop what does it do for the fsm

A

D Flip-Flop: Captures input (D) on clock edge.
T Flip-Flop: Toggles state on each clock pulse.
JK Flip-Flop: More complex behavior based on J and K inputs.

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12
Q

why do we use Synchronous Reset, and what does it do

A

it sets output Q to 0 on the next clock edge. Use: Initialize state during power-up (turned on)

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13
Q

Asynchronous Reset:

A

Action: Sets output (Q) to 0 immediately, independent of the clock. Use: Immediate initialization; critical for timing-sensitive circuits.

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14
Q

What are the main components of FSM implementation architecture?

A

State register, next state logic, and output logic.

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15
Q

What is a Moore FSM?

A

An FSM where outputs depend only on the current state.

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16
Q

What is a Mealy FSM?

A

An FSM where outputs depend on both the current state and inputs.

17
Q

Q: What is a key advantage of a Mealy FSM over a Moore FSM?

A

A: Mealy FSMs can have fewer states because outputs can change based on inputs without waiting for a state transition.

18
Q

Q: What is a potential drawback of a Mealy FSM?

A

A: Outputs can change mid-cycle, which may lead to less predictable timing.

19
Q

key difference from moore to mealy