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EE 232 > Final Review > Flashcards

Final Review Flashcards

1
Q

An input table with n inputs should have how many binary entries?

A

2^n

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2
Q

Two transistors connected in series form what logic operation?

A

AND

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3
Q

Two transistors in parallel implement what logic operator?

A

OR

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4
Q

What is the difference between analysis and synthesis?

A

Analysis is done on existing networks, synthesis is creating new networks

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5
Q

Functional verification is what?

A

The process of applying all input combinations to a network and measuring the outputs in a truth table

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6
Q

What is the definition of functionally equivalent?

A

Two networks of different construction that implement the same overall function

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7
Q

Perfect Induction is what process?

A

Constructing truth tables for a boolean function that is to be analyzed, and checking all of the outputs manually

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8
Q

An expression containing two or more AND terms ORed together is what kind of expression?

A

Sum of products, Product of sums is the reverse (ORs ANDed)

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9
Q

Each unique SOP product term is called what?

A

Minterm

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10
Q

Maxterms correspond to cells in the K-Map or Rows in the truth table where the output is what?

A

0

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11
Q

Which two gate types have universality?

A

NAND and NOR

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12
Q

What causes errors during transmission?

A

Electrical Noise

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13
Q

What is a parity bit and how are they generated?

A

An additional bit appended to the package; 0 for an even number of 1s, 1 for odd.

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14
Q

Functions with don’t care conditions have what title?

A

Incompletely Specified

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15
Q

In what case would the carry bit of an addition be ignored?

A

If the numbers were represented in 2s compliment

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16
Q

A full adder can be constructed with how many half adders?

A

Two

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17
Q

An n bit adder adds numbers of what bit length?

A

n

18
Q

What is a circuit’s critical path?

A

The longest gate delay possible.

19
Q

Why would ripple adders be used instead of lookahead adders?

A

Ripple adders are cheaper

20
Q

What is a noise margin?

A

The maximum noise voltage added to the input of a digital circuit

21
Q

What does CMOS stand for?

A

Complementary Metal-Oxide-Semiconductor

22
Q

What is the difference between NMOS and PMOS transistors

A

NMOS is open at a gate voltage 0, PMOS is closed

23
Q

What type of transistor is denoted with a circle on the gate input?

A

PMOS

24
Q

What transistors are used for the upper and lower networks, and what are their functions?

A

Upper: PMOS, Load
Lower: NMOS, Logic

25
Q

What parameter of a transistor is varied to decease propagation delay

A

Width

26
Q

What is the fan-in of a logic gate

A

The number of gate inputs

27
Q

What is the fan-out of a gate?

A

The amount of gates that it drives, also called load

28
Q

Drivers are constructed using what logic gates and for what purpose?

A

Two CMOS inverters with high W in order to increase current flow

29
Q

Shannon’s expansion theorem does what?

A

Expands a boolean function in terms of one variable

30
Q

Sequential logic circuits depend on what?

A

Both current state and past state inputs

31
Q

A D latch ties the data input to what

A

The set and reset

32
Q

Under what condition does a JK FF behave like a T FF

A

J=K=1

33
Q

What is the difference between a Moore and a Mealy machine

A

Moore depends only on states, Mealy depends on states and primary inputs

34
Q

When states are assigned to binary sequences where only one bit is one that is the process of what?

A

one-hot encoding

35
Q

Which type of state machine reacts quicker?

A

Mealy Machines

36
Q

What are the main parts of a digital system?

A

Datapath Circuit, Control Circuit, Memory, Bus, I/O ports

37
Q

What two numbers are associated with a memory cell?

A

Content (stored data) and Capacity/Density (size of the memory)

38
Q

What is the difference between RAM and ROM

A

Random access memory both reads and writes, read only memory contains permanent binary information

39
Q

What is volatile memory?

A

Memory that only works as long as it’s powered

40
Q

What is the difference between SRAM and RAM

A

SRAM will keep data permanently without needing to be refreshed, but needs to be powered.

41
Q

What is the difference between ASIC using standard cells and gate arrays?

A

Standard cells store operations in a library, not on chip, and are connected during fabrication. Gate arrays are connected after fabrication.

42
Q

PLA and PAL differ how?

A

PLA has a programmable AND plane, PAL has a programmable AND and OR plane

EE 232 (1 decks)

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