Final Exam Flashcards

1
Q

What are the three key concepts of the von Neumann Architecture?

A

1) Data and instructions are stored in single read/write memory
2) memory is addressable by location, regardless of the data type
3) execution occurs in a sequential fashion

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2
Q

What is hardware?

A

The physical configuration and wiring of the computer.

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3
Q

What is software?

A

A sequence of code or instructions carried out by the hardware.

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4
Q

What are the two major components of the CPU?

A

The instruction interpreter and and a module for general-purpose arithmetic and logic functions.

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5
Q

What are the two registers internal to the CPU?

A

1) Memory address Register (MAR) (stores mem. add for next read/write)
2) Memory Buffer Register (MBR) contains data to be written / just received from memory

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6
Q

Where is the address of the next instruction to be fetched held?

A

The PC register

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7
Q

What does the V flag mean?

A

A signed overflow flag - set when an addition or subtraction results in signed overflow (i.e. overflow for certain container size)

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8
Q

What does the C flag mean?

A

The carry flag - reports unsigned overflow.

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9
Q

What does the N flag mean?

A

Negative flag - always the same as the most significant bit of the result (the sign bit)

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10
Q

What does the S flag mean?

A

The sign flag - indicates the expected sign of the result (as if overflow didnt occur)

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11
Q

When are the N and S flags different?

A

When overflow occurs they are opposites.

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12
Q

What does the Z flag mean?

A

The result of the last operation was zero.

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13
Q

What does the H flag mean?

A

The half-carry flag - is set when addition sets off a “carry” from the LS nybble to the MS nybble in a byte.

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14
Q

What is volatile memory?

A

Information that decays naturally or is lost when power is turned off

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15
Q

What is nonvolatile memory?

A

Information that does not need power to be retained, remains without deterioration. ex: magnetic surface memory

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16
Q

What is the cache?

A

It is a device for staging the movement of data between main memory and processor registers to improve performance.

17
Q

Initialize stack pointer

A

ldi r16, low(RAMEND)
ldi r17, high(RAMEND)
out SPL, r16
out SPH, r17