Final Flashcards
Variable-length instructions are easier to decode than fixed-length instructions
False
The best architecture for evaluating postfix notation is the stack- based architecture
True
Fixed-length instructions always have the same number of operands
False
One disadvantage to _______ representation is that most computers require words to be written on word address boundaries
big endian
A jumpstatement is an example of a(n) _____________ instruction
Transfer of control
Fixed- length instructions
waste space but are fast and perform better than variable length instructions
waste space but are fast and perform better than variable length instructions
memory-memory, register-memory, and load-store
Consider the postfix (reverse Polish notation) 10 5 + 6 3 - / equivalent infix expression is:
(10+5)/(6-3)
Suppose the memory of a computer is as follows:
12
34
56
78
What integer value is this on a big endian computer?
12345678
Suppose the memory of a computer is as follows:
12
34
56
78
What integer value is this on a little endian computer?
78563412
Suppose the memory of a computer is as follows (address 100 contains the hex value CA, etc)
CA
FE
BA
BE
Assume also that these four memory locations hold one 32 - bit integer. What integer value (in hex) is this on a little endian machine?
BEBAFECA
Suppose we have the instruction LDWA 800. Given memory as follows: 800 900 900 1000 1000 500 1100 600 1200 800
What would be loaded into the accumulator if the addressing mode is immediate?
What would be loaded into the accumulator if the addressing mode is direct?
What would be loaded into the accumulator if the addressing mode is indirect?
800
900
1000
very useful in matrix operations:
no great example because this category not very useful:
Word processing and normal everyday:
activities most current parallel systems:
SIMD
MISD
SISD
MIMD
What is the basic computer performance equation?
CPU Time = seconds/program = (instructions/program) X (avg. cycles/instruction) Х (seconds/cycle)
How do CISC and RISC machines try to achieve better performance?
- CISC machines reduce the number of instructions per program, and
- RISC machines reduce the number of cycles per instruction.
What does Amdahl’s Law tell us about performance optimization?
Amdahl’s Law tells us that the system performance gain realized from the speedup of one component depends not only on the speedup of the component itself, but also on the fraction of work done by the component.
What are the three primary characteristics of RISC computers?
- Fixed - length instructions
- high level of pipelining , and
- multiple register sets
Why do RISC machines operate on registers?
This means that instructions can be executed in fewer cycles and speeds up the execution of the code, and thus the performance of the hardware. The goal for RISC architectures is single-cycle instructions.
What does the “reduced” in reduced instruction set computer really mean ?
“Reduced “ originally meant providing a set of minimal instructions that could carry out all essential operations . The main objective in RISC machines is to simplify instructions so they can execute more quickly .
Name the four primary models of computation in Flynn’s taxonomy.
SISD
SIMD
MISD
MIMD
What are the three shortcomings of Flynn’s Taxonomy?
- There is no need for MISD machines .
- Parallelism is not homogeneous .
- There is no straightforward way to distinguish architectures of the MIMD category .
Explain the difference between loosely coupled and tightly coupled architectures.
Loosely coupled and tightly coupled are terms that describe how multiprocessors deal with memory.
If there is one large, centralized, shared memory, we say the system is tightly coupled.
If there are multiple, physically distributed memories, we say the system is loosely coupled.
What is performance benchmarking?
Performance benchmarking is the science of making objective assessments concerning the performance of one system over another
What are SPEC and TPC acronyms for? How is the focus of the SPEC benchmark different from TPC benchmark?
SPEC is the Standard Performance Evaluation Corporation. TPC is the Transaction Performance Council.
The SPEC evaluates only CPU performance, the TPC measures the performance of the entire system.
How can a programmer improve cache performance ?
- Programmers should focus on improving the reference locality
- This can be done by using cache -conscious algorithms
- or a program’s data organization and layout.
