Fetch Execute Flashcards
What is the function of the PC in the processor schematic?
The PC (Program Counter) holds the address of the next instruction to be fetched.
What does MAR stand for and what is its role?
MAR stands for Memory Address Register; it holds the address of the memory location to be accessed.
What is the purpose of the MBR?
MBR stands for Memory Buffer Register; it holds the data that is being transferred to or from memory.
Define the term CIR in the context of a processor.
CIR stands for Current Instruction Register; it holds the instruction currently being decoded.
What happens during the fetch stage of instruction execution?
The contents of the PC are transferred to the MAR, and then the address in MAR is accessed to retrieve data.
Fill in the blank: The instruction set is a set of ______ for the processor.
machine language commands
What are the two main parts of an instruction?
The opcode and the operand.
What does the opcode determine?
The operation that is to be carried out (e.g., ADD, LOAD).
Explain the difference between immediate addressing mode and direct addressing mode.
Immediate addressing mode uses the actual data value in the operand, while direct addressing mode specifies the address of the data in memory.
What is the role of the control unit during the decode stage?
The control unit decodes the instruction held by the CIR into opcode and operand.
True or False: The opcode is split into two parts: the basic machine operation and the operand.
False. The opcode is split into the basic machine operation and the addressing mode.
List the common set of operations all processor architectures have.
- Data transfer between internal components
- Arithmetic operations
- Logical operations
- Shift operations
- Branching
- Comparison
What is stored in the accumulator register after executing an instruction?
The result of the executed instruction.
What does the status register do?
It is updated to reflect the result of the executed instruction.
Fill in the blank: The opcode consists of the basic machine operation and the ______.
addressing mode
What are the two stages of the fetch operation?
- MAR <- [PC]
- MBR < [Memory]MAR_address
What happens to the PC after fetching the instruction?
The PC is incremented by one to prepare for the next cycle.
