F453 - computer architectures

Question 1

Describe the effects of the fetch-execute cycle on the program counter (PC) and the memory address register (MAR).

Answer 1

 PC holds address of next instruction
 PC passes this address to MAR…
 MAR holds address of instruction/data
 Instruction/data from address in MAR is loaded to MDR
 PC is incremented (in each cycle)
 PC is changed when there is a jump instruction…
 …by taking address from instruction in CIR

Question 2

State three features of a Complex Instruction Set Computer (CISC) architecture.

Answer 2

 uses (complex) instructions each of which may take
 multiple cycles
 single register set
 instructions have variable format
 many instructions are available
 many addressing modes are available

Question 3

Explain one disadvantage, other than cost, of a CISC architecture compared with a Reduced Instruction Set Computer (RISC) architecture.

Answer 3

 programs run more slowly…

 …due to the more complicated instructions/circuit

Question 4

Explain the term register.

Answer 4

 a location in the processor
 used for a particular purpose
 (temporarily) stores data/or control information
 explained example of contents held by named register

Question 5

Give the correct names for two of the special registers used. (Do not use abbreviations.)

Answer 5

 program counter
 memory address register
 memory data register/memory buffer register  current instruction register
 index register
 interrupt register
 accumulator

Question 6

Explain the advantages and disadvantages of parallel processor architecture compared with Von Neumann architecture.

Answer 6

advantages:
 allows faster processing
 more than one instruction (of a program) is processed at the same time  different processors can handle different tasks/parts of same job
disadvantages:
 operating system is more complex…
 …to ensure synchronisation
 program has to be written in a suitable format  Program is more difficult to test/write/debug

Question 7

State the three stages, in order, of the machine cycle in classic Von Neumann architecture.

Answer 7

 fetch, decode, execute

 correct order

Question 8

Explain the term array processor.

Answer 8

 a processor that allows the same instruction to operate
 simultaneously…
 …on multiple data locations
 the same calculation on different data is very fast
 Single Instruction Multiple Data (SIMD)

Question 9

Compare the number of machine cycles used by RISC and CISC to complete a single instruction.

Answer 9

 RISC: each task may take many cycles
 CISC: a task may be completed in a single cycle
 …as instructions may be more complex than individual instructions in RIS

Question 10

Give one example of the type of task for which an array processor is most suitable.

Answer 10

(accept any example of a mathematical problem involving large number of similar calculations)  eg weather forecasting / airflow simulation around new aircraft

Question 11

Give the name of the computer architecture that uses the FDE cycle with a single control unit

Answer 11

Von Neumann

Question 12

Explain the effect of using a co processor system for complex calculations for scientific research

Answer 12

calculations are done by the maths co-processor
..so processing is faster
..when using floating point arithmetic

Question 13

Explain the effect of using a co processor system for printing letter to customers for an advertising campaign

Answer 13

no increase in speed..

..as co processor not suitable for task as there are no calcuations