Examen 1 Flashcards
Bit
A variable which can only assume two values, 0 or 1.
Nibble
4-bit word
Byte
8-bit word
Word
16-bit word
Double Word
32-bit word
Quad
64-bit word
Least Significant Bit
Rightmost bit
Most Significant Bit
Leftmost bit
How many different word can be formed with n-bits
2^n different words
Kilo(K)
1k = 2^10
Mega(M)
1M = 2^20
Giga(G)
1G = 2^30
Tera(T)
1T = 2^40
How to convert from Base R to Decimal
Expansion Method
How to convert from Decimal to Base R
Use division method for integer part and multiplication method for fractional part
Division Method
Divide the number to be converted by the desired base the remainder is your a0 and the quotient is for repeating the process you stop when quotient is 0.
Multiplication Method
Multiply by the desired base the integer part is your a-1 the fractional part is for repeating the process you stop when a zero decimal part is reached, to decimal parts are the same or you exceeded 8 multiplications.
How to convert Octal and Binary
Associate each octal digit to three binary digits and viceversa
How to convert HEX and Binary
Associate each hex digit to four binary digits and viceversa
What is the word size of a register
quantity of bits in each location its determined by the data bus size
How do you determine the number of locations of a memory
2^address lines
Mention Memory Types
RAM,ROM,PROM,EPROM,EEPROM
Microprocessor Unit
Contains a general purpose CPU,Buses,memory,and I/O interfaces. They are optimized to move code and data from external memory into the chip
Micro-controller Unit
Less complex CPU. CPU,Memory & I/O are integrated within a single chip. They are more application oriented than general purpose microprocessor.
Describe the CISC Arquitecture
-Variable length instructions
-Large instruction set
-Focuses in accomplishing as much as possible with each instructions.
Hardware complex programming easier.
Describe the RISC Arquitecture
-Fixed length instructions
-Short instruction set
-Focuses on simple instructions
Hardware simplified and programming harder
Components of a CPU Arquitecture
- ALU
- Control Unit
- Registers
- Bus Interface Logic
Datapath
Collection of hardware components within the CPU performing data operations.
Controlpath
Hardware components performing system control operations
What is the ALU
Performs supported logic and arithmetic operations
What is the BIL
The CPU structures that coordinate the interaction between the internal buses and the system buses
Whats is a Register
A temporary storage for data, memory addresses, and control information in a way that can be easily accessed.
Mention and Describe the Special Purpose Registers
IR(Instruction Register) - holds the instructions that is beign currently decoded and executed in the CPU
PC(Program Counter) - holds the address of the instruction to be fetched from memory by the CPU.
SP(Stack Pointer) - refers to top of the stack.
SR(Status Register) - contains flags.
Mention and Describe the flags in the Status Register
ZF(Zero Flag) - result of an operation is 0.
CF(Carry Flag) - set when an operation produces a carry
NF(Negative Flag) - set when result of an operation is negative and cleared otherwise
Mention and Describe the flags in the Status Register
ZF(Zero Flag) - result of an operation is 0.
CF(Carry Flag) - set when an operation produces a carry
NF(Negative Flag) - set when result of an operation is negative and cleared otherwise
VF(Overflow Flag) - signals an overflow on addition or subtraction cleared otherwise.
IF(Interrupt Flag) - indicates whether a program can be interrupted by an external event or not
What is an Address Bus
A set of lines transporting address information.They are unidirectional.
What is a Control Bus
Group of all the lines carrying the signals that regulate the system activity. They are unidirectional.
High Bank
Odd Addresses
Low Bank
Even Addresses
Big Endian
Data is stored with the most significant byte in the lowest address and the least significant byte in the highest address
Little Endian
Data is stored with the least significant byte in the lowest address and the most significant byte in the highest address
Memory Map
Model representation of the usage given to the addressable space of a microprocessor based system
Global Memory Map
Depicts the entire addressable space
Partial Map
Provides detail of only a portion of addressable space
What is the I/O subsystem composed of?
All the devices (peripherals) connected to the system buses
Input Transaction
Moves information into the CPU from a peripheral device
Output Transaction
Send information out from the CPU to external devices
Mention the common peripherals to be found in most embedded systems
Timers, Watchdog Timer, Communication interfaces, Analog-to-Digital Converter, Digital-to-Analog Converter, Development peripherals
Timers
These peripherals can be programmed for any use of prescribing time intervals
Watchdog Timer
Used as a safety device. It resets if it does not receive a signal generated by the program every X time units
Communication Interfaces
Used to exchange information with another IC or system
Development Peripherals
Download the program into the MCU and for debugging
I/O Mapped I/O
Have separate address spaces for memory and I/O devices, requiring specific input and output instructions
Memory Mapped I/O
I/O devices are inside the memory space
Control Registers
Allow for configuring the operation of the device and the interface itself.Also called Mode or Configuration Register
Status Register
Allow for inquiring about the device and interface status
Data Register
Allow for exchanging data with the device itself
