ET VOL 6 Digital Data 12,6,7 Flashcards

1
Q

Which of the following items is stored in main memory?

A

Data, programs, calculations, and operands

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

Time interval from the instant a request for data is initiated until the data is available for use.

A

access time

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

The output side of a flip-flop is read from memory without having to be rewritten

A

non-destructive readout

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

The power to the computer is turned off and the contents of memory are retained.

A

nonvolatile memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

The particular location of a larger memory array where a packet of information is located.

A

memory access

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

Power is shut off to the computer and the contents of the semi- conductor memory are lost.

A

volatile memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

The data is lost when it is read from memory.

A

destructive readout

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

A memory unit that can receive requests from more than one CPU or I/O section is known as which of the following types of memories?

A

Multiported memory module

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

Pcb type memories are usually composed of which of the following memory types?

A

Semiconductor

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

In a typical square form memory, the intersection of an x row and y column is called a

A

memory word address

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

The x rows and y columns of a typical memory will be equal in number.

A

true

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

Memory operations in most computers usually include which of the following items?

A
  1. Control circuits 2. Timing circuits 3. Memory cycle
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

Memory interface circuits include which of the following items?

A

Communication lines Interfacing register

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

A word is read from memory, then rerouted back through the Z register to be rewritten. This is what type of memory?

A

Destructive readout

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

Priority of memory requests are evaluated by which of the following devices?

A

Control circuits

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

Memory read/write enables are provided by which of the following devices?

A

Timing circuits

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
17
Q

what is the memory cycle

A

read/write

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
18
Q

During a complete memory cycle, the first thing that must occur is which of the following?

A

Memory address translation is accomplished

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
19
Q

main memory is also called

A

ROM

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
20
Q

To locate a memory address word, the computer uses which of the following items in memory?

A

Memory logic

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
21
Q

The conversion from a logical to a physical memory address is a function of which of the following items in memory?

A

Memory logic

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
22
Q

In all computers, for every read operation there will always be a corresponding write operation.

A

false only in destructive memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
23
Q

In order to increase memory speed using interleaving, which of the following items are required?

A

More complex CPU and memory control circuitry

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
24
Q

When odd parity is used for memory fault detection, all words stored in memory will have which of the following bits?

A

An odd number of set bits stored at each memory location

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
25
Q

The memory protection register set is used for which of the following purposes?

A

To restrict read/write operations in portions of memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
26
Q

In a memory segment within the protected area with all three bits of the memory protection control register set, which of the following operations are allowed?

A
  1. Execute protected 2. Write protected 3. Read protected
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
27
Q

Memory lockout is used by larger computers to prevent access to particular areas of memory by task state instructions. Which of the following describes the lockout function?

A

It is disabled when the CPU enters a particular executive or interrupt state and disabled when the CPU enters the task state

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
28
Q

Compared with semiconductor memories, magnetic memories have which of the following advantages?

A

They require less power and they are nonvolatile

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
29
Q

The state of a core or film is changed by which of the following conditions?

A

Current flow in the opposite direction of sufficient magnitude to overcome the magnetic field and to magnetize in the new direction

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
30
Q

Compared with core memory, film memory has which of the following advantages?

A

Increased speed of read/write operations and less power required 2. More compact and durable 3. Twice as many memory cells can be put in the same space for the same amount of power

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
31
Q

Each ferrite core can store what total number of bits?

A

1

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
32
Q

In a four-wire core winding, what is the physical make up of the windings that are strung through each and every core?

A

2 drives lines, 1 sense line, and 1 inhibit line

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
33
Q

What Detects the change in state of the core from one to zero.

A

Sense Line

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
34
Q

What Each line provides 1/2 of the current necessary to change the state of the core.

A

Drive Line

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
35
Q

What Prevents changing the core from a zero to a one.

A

Inhibit Line

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
36
Q

In a three-wire core, this line performs the same function as in the four-wire core.

A

Sense

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
37
Q

To simplify addressing, reading, and writing operations, magnetic cores are arranged in which of the following ways?

A

In matrices

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
38
Q

Which core in an array will be switched from one state to another?

A

A core with a full read or write current passing through it

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
39
Q

In a core array the inhibit line is threaded in (a) with the x or y drives (series, parallel) lines and the sense line threaded through (b) core. (each, every other)

A

(a) Parallel (b) each

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
40
Q

What is the basic building block of the memory stack?

A

Memory Plane

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
41
Q

The address register bits are used to translate the bits to make which of the following bit selections?

A

X and Y primary, secondary, and diode; stack; and inhibit upper and lower stack

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
42
Q

Which selectors are activated only when writing zeros?

A

Inhibit

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
43
Q

In a core read/write cycle, the read current is designed to change the state of the core(s) to (a) what value; and the write current is designed to change the state of the core(s) from (b) what value to (c) what value?

A

(a) Zero (b) zero (c) one

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
44
Q

The process of reading cores to the zero state is known as which of the following types of readout?

A

Destructive readout

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
45
Q

In a core memory, a restore cycle is necessary after data has been read from memory for what reason, if any?

A

To change the state of each selected core from zero to one

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
46
Q

During a restore operation of zeros in a three-wire core, the absence of write current on which of the following lines will leave the cores in the zero state?

A

Digit

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
47
Q

What specific number of paired film spots is used for each bit position?

A

Two

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
48
Q

Current flow through which of the following lines will magnetize a film spot?

A

Word or sense/digit, depending on the function

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
49
Q

In a film memory, a packet stores what specific number of bits of data?

A

2

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
50
Q

Which, if any, of the following devices makes the mated film cells less susceptible to the disturbance from other cells in close proximity to them?

A

keeper (2nd film)

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
51
Q

How is mated film memory structured?

A

Word organized

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
52
Q

What item is the basic building block of the film memory stack?

A

packet (mated Film)

53
Q

The memory capacity of a film core storage device is determined by which of the following factors?

A

Number of packets and the size of the array in the memory stack

54
Q

In film storage, up to how many words can be selected at each memory location?

A

4

55
Q

The address register bits used to translate the bits to make selections are processed in which of the following sequences?

A

Stack, memory location, and word at the address location

56
Q

A mated film memory cell is read by which of the following methods?

A

A current is generated along the word line and a transverse field is applied to the thin film cell

57
Q

What factor will determine the recorded state of the film?

A

The direction of the cell vector rotation induced film signal on the sense/digit line

58
Q

When a one is to be stored, (a) what is the direction of the bit current in relationship to that used to store a zero and (b) what field steers the vector to the one state?

A

(a) Reversed (b) Longitudinal

59
Q

In a restore operation of a film memory, what factor determines the direction of the digit current on the sense/digit line?

A

Binary value of the data register

60
Q

Semiconductor memories are known by all of the following terms except which one?

A

Read-only memory (RAM)

61
Q

Semiconductor memories have which of the following characteristics?

A

Non-destructive readout and volatile

62
Q

Each RAM chip contains which of the following items?

A

Large numbers of memory cells and the logic to support them

63
Q

The transistors used in flip-flops of static RAM may be MOS or bipolar. Compared to MOS, bipolar has what advantage, if any?

A

Higher access speed

64
Q

In a static RAM, the address lines are used to enable the addressed memory cell flipflop circuit by row and column number.

A

true

65
Q

Data is stored, or read from, the memory cells of SRAM via a total of how many lines?

A

4

66
Q

The (a) address lines and the (b) I/O data lines are usually tied to what buses?

A

(A)Computer or memory system bus (B)Data bus

67
Q

Each dynamic RAM cell consists of which of the following devices?

A

One MOS transistor and one tiny capacitor only

68
Q

DRAM cells do not retain their charged state for more than a few milliseconds. This degradation is due to which of the following factors?

A

Time and temperature

69
Q

To retain their charged state, DRAMs must be refreshed. Of the following methods, which one is (a) more cost effective because it uses what (b) device?

A

(A)External (B)Single refresh address generator

70
Q

In DRAM organization, the data input and data output lines may be tied together in what type of application, if any?

A

One that uses a bidirectional data bus

71
Q

Programs stored on ROM are often referred to as firmware for which of the following reasons?

A

They are more hardware than software

72
Q

Compared to RAM, ROM has all of the same operational characteristics except which of the following?

A

Can be written to by normal computer accessing methods

73
Q

ROM has what primary use?

A

Allows the computer to perform I/O operations

74
Q

The acronym BIOS stands for what term?

A

Basic input/output system

75
Q

The acronym NDRO stands for what term?

A

Non-destructive readout

76
Q

In the example, the ROM chip memory array has a total of(a) how many decoders and (b) how many lines are input to these decoders?

A

(a) 2 (b) 13

77
Q

ROMs may be made of which of the following materials?

A

Hardwired, magnetic, fusible links, and MOS and bipolar transistors

78
Q

To perform ROM operations, which of the following circuits are used?

A

Timing, control signals, registers, flipflops, and internal buses

79
Q

Compared to PROM, an erasable PROM has what additional advantage, if any?

A

It can be erased and reprogrammed

80
Q

While still in the circuit, which of the following PROMS can (a) be programmed and (b) erased?

A

(a) EAPROM/EEPROM (b) EAPROM/EEPROM

81
Q

A device that serves as a shared entry point from a local-area network into a larger information resource is which of the following?

A

Gateway

82
Q

A function that transfers status by using the appropriate control signals from a transmitting device to the receiving computer is which of the following?

A

Input data (ID)

83
Q

The I/O processor controls which of the following transfers?

A

The transfer of information between main memory and the external equipments

84
Q

Establishing, directing, and monitoring transfers with external equipments are the functions of which of the following devices?

A

IOC input output controller

85
Q

Changes to input and output control and data signal voltages are functions of which of the following devices?

A

IOA Input output adapter

86
Q

The type of connectors for the I/O channels or ports will be dictated by which of the following factors?

A

Interfacing

87
Q

The driver circuits are used for which of the following tasks?

A

To pass interface and data signals to the external equipments

88
Q

Examples of consistencies found in the architecture of a computer’s I/O section include which of the following?

A

The arrangement and format of the information exchanged

89
Q

If a printer senses a paper jam during a print operation, which of the following actions would occur?

A

A control word would be sent to the computer specifying an error condition (external interrupt)

90
Q

Handshaking is also known by which of the following terms?

A

Function control word

91
Q

The type of interface used when all bits of information represented by a byte or word are input or output simultaneously is known as which of the following formats?

A

Parallel format

92
Q

Command instructions provide control over which of the following areas/operations?

A

IOC single and dual channel operations

93
Q

The I/O command start instruction accomplishes which of the following actions?

A

Specifies an IOC, then halts further CPU processing

94
Q

The CPU will delay processing while waiting for an I/O operation only during which of the following actions?

A

Executions of an I/O command start instruction

95
Q

The actual execution of chaining instructions is independent of the CPU.

A

true

96
Q

Input and output chains deal primarily with which of the following activities?

A

Transfer of blocks of information

97
Q

Data transfer between the computer and external equipments will take place when which of the following conditions is/are met?

A

Initiate input/output or equivalent instruction is executed by the CPU

98
Q

Which of the following is one of the constants in all I/O operations?

A

When the data transfer will begin

99
Q

In I/O operations, communications with the external equipment require which of the following devices/operating modes?

A

A single channel operating mode

100
Q

When an index address in main memory is specified by an external equipment during an I/O operation, the computer is operating in which of the following modes?

A

Externally specified index mode (ESI)

101
Q

In I/O operations, which of the following is one of the primary uses of registers?

A

To enable and route both control and data information, CPU I/O and memory

102
Q

Decoder circuits are used for which of the following purposes?

A

Address translation

103
Q

Status registers are used for which of the following purposes?

A

To hold information for the CPU that indicates the operating condition and current activities of the external equipments

104
Q

In computers with an IOC, once started the master clock can be stopped when which of the following actions occurs?

A

Computer master clear

105
Q

In computers with an IOC, the master clock is started when which of the following actions occurs?

A
  1. The computer is initially powered on 2. The computer is auto restarted
106
Q

The I/O control circuits are controlled by which of the following means?

A

the computer program

107
Q

A sequential set of memory locations that contains data to be sent out or an area that is set aside for data to be received is called which of the following?

A

A buffer

108
Q

Which of the following are unbuffered operations?

A

CPU and various parts of the computer

109
Q

The I/O processor’s sequencing circuits control which of the following actions?

A

The order in which events will be executed based upon the translated function code

110
Q

The CPU interfaces with the I/O processor through which of the following means?

A

The CPU’s I/O instructions

111
Q

I/O control memory words are set aside in main memory to control which of the following actions?

A

Data transfers for I/O buffer functions

112
Q

In parallel operations, each I/O channel has its own block of memory addresses for which of the following operations?

A

Input, output, external function, and external interrupt operations

113
Q

Serial operations are affected by which of the following factors?

A

Character size, parity selection, baud rate, and synchronous and asynchronous interfacing

114
Q

Monitor words are used for which of the following purposes?

A

To store characters for comparison with received data characters

115
Q

Another term for accumulator based I/O is which of the following?

A

Direct CPU interface

116
Q

The CPU handles all I/O transactions by executing one or more instructions for each word of information transferred. This process is known by which of the following terms?

A

Accumulator based I/O (direct CPU interface

117
Q

In memory mapped I/O, the CPU accesses the I/O device by which of the following means?

A

Placing appropriate addressing information on the bus

118
Q

The main advantage of direct memory access is which of the following?

A

speed

119
Q

When the CPU and the DMA attempt to access main memory simultaneously, the CPU has priority.

A

false DMA (direct memory access)

120
Q

When a high speed disk drive is used, output data will be in which of the following forms?

A

Binary

121
Q

The technique used when more than one peripheral device is connected to a single port/channel is known by which of the following terms?

A

Daisy chaining

122
Q

When more than one peripheral device is connected to a single port/channel, the priority of a device is determined by which of the following factors?

A

CPU

123
Q

When using a request and acknowledge system, the priority of the fictions and channels is determined by which of the following factors?

A

The I/O controller

124
Q

Communication formats are governed by which of the following items?

A

The interfacing standard

125
Q

The compatibility of voltage levels between the computer and external equipments is ensured by which of the following means

A

The I/O processor

126
Q

Transfer of data within a digital computer is accomplished internally using which of the following means?

A

Parallel format

127
Q

The conversion of data for transmission over a serial channel is accomplished by which of the following means?

A

A universal receiver-transmitter

128
Q

When a universal synchronousasynchronous receiver transmitter is used, it functions as which of the following devices?

A

A peripheral device to the microprocessor

129
Q

The universal synchronous-asynchronous receiver transmitter’s specific asynchronous interfacing is controlled by which of the following means?

A

The CPU