Embedded Systems terminology Flashcards

Common terms and concepts for embedded systems

1
Q

Term

A

Definition

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2
Q

~

A

(not) 1. res. The unary bitwise-NOT operator in C and various related languages. Sometimes confused with the logical NOT operator !, though their functions are very different. Make sure you use the right one; your compiler won’t know to warn you of the error.

EXAMPLE: If 16-bit x is 0x0123, ~x is 0xFEDC; whereas !x is 0 (Boolean false).

  1. symb. A prefix used on schematic diagrams and in logic equations to indicate active low signals.
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3
Q

µC/OS

A

(micro-kos) N. A real-time operating system for small microcontrollers. Derived from a two-part expository article in Embedded Systems Programming in May–June 1992, this little RTOS took on a life of its own with the publication of a book-length treatment of the subject by creator Jean Labrosse. Now in the operating system’s second release (µC/OS-II), the revised book includes complete source code and explanations of everything it does. Micrium (link is external) sells licenses for commercial use.

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4
Q

1-Wire

A

N. A low-cost bidirectional serial communications bus requiring just a single wire to implement. An asynchronous, half-duplex, single-master component bus, 1-Wire minimizes device pin count by using extra on-chip circuitry to enable each 1-Wire component to communicate serially (over a shared connection) with other 1-Wire devices. Compatible serial EEPROMs, A/D converters, temperature sensors, and other devices are available. Electrical features include low data rates (about 16 kbps, max), flexible voltage and timing requirements, long maxium distances (up to 1,000 feet), and optional parasitic powering of slaves. Each 1-Wire device has a unique 48-bit serial number, so multiple slaves can share the same bus.

HISTORY: The 1-Wire protocol was invented by Dallas Semiconductor, which received a related patent prior to its merger with Maxim.

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5
Q

1489

A

(fourteen eighty-nine) num. An obsolete chip used to receive RS-232 signals. A 1970s part originally from Motorola, the 1489 was a line receiver that translated the +/-15 V RS-232 levels to TTL signals. Now replaced by combined receiver/transmitter chips such as the MAX232 from Maxim.

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6
Q

4004

A

(four thousand four) num. The first microprocessor. Invented by Intel (a memory company at the time) in 1971, the 4004 was the world’s first general-purpose microprocessor. A far cry from modern processors, the 4004 had a 12-bit instruction pointer, forty six 8-bit opcodes, and sixteen 4-bit registers. The 4004 was a 16-pin DIP part, containing about 2,000 transistors.

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7
Q

68xx

A

(sixty eight ex-ex) num. A family of 8- and 16-bit microcontrollers from Freescale (nee Motorola Semiconductor). Family members include the 68HC05, 68HC11, and 68HC12.

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8
Q

7-segment display

A

n. A device that displays all numbers and many letters and symbols via just seven linear segments. Most also have one or two decimal points. The LED version of an 7-segment display comes in both common anode and common cathode configurations, indicating whether each diode’s anode or cathode is connected together. 7-segment LCD displays are also widely used.

There’s no standard for driving LEDs. Some designers drive them directly from the processor’s GPIO pins, connecting each segment to an output pin. This uses more I/O pins but lets the programmer generate any of the possible characters. Others use a driver IC (e.g., 74HC4511), which accepts a 4-bit input, creates a character, amplifies the output, and drives the segments; these limit the possible characters that can be displayed.

To support multi-digit displays, most vendors supply banked 7-segment displays, in which the anodes or cathodes are brought ought individually to pins, and the other terminals–those connected to segments–are all tied together. This supports multiplexing of the display via dedicated hardware or smart software.

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9
Q

8-bit

A
  1. adj. Generally used to denote a processor that uses a data bus 1 byte wide. Note that this always refers to the processor’s data bus width. Typical 8-bit CPUs have 16 or 20 address lines.
  2. adj. Any circuit or algorithm that operates on data 1-byte wide. Examples include 8-bit buffers and 8-bit D/A converters.
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10
Q

8051

A

(eighty fifty-one) num. An 8-bit microcontroller family. The original 8051 was designed in the late 1970s by Intel. Its many variants are still popular with embedded systems developers and are now available from multiple suppliers. Related chips include Siemens’ 80C517, TI’s TMS370, and the 80251.

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11
Q

8254

A

(eighty-two fifty-four) num. The programmable counter/timer chip used in the original IBM PC and still emulated to this day.

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12
Q

8N1

A

(as letters and numbers) abbr. A common flavor of serial communications that features 8 data bits, no parity, and 1 stop bit. Other specifications have the same format, with E and O indicating even and odd parity, respectively. This information is normally coupled with the number of data bits per second, such as 9600 bps or 57.6 kbps. For example, the specification “9600 8E1” means 9600bps serial communications with 8 data bits, 1 even parity bit, and 1 stop bit.

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13
Q

A/D converter

A

(ay to dee converter) n. A hardware device that reads an analog signal—typically a voltage—compares it to a reference signal, and converts the resulting percentage to a digital value. Short for analog-to-digital converter. Abbreviated ADC. The reference signal represents 100%. An n-bit A/D converter has a maximum value of 2n - 1 and a resolution of Vref/2n.

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14
Q

ABEL

A

(like Cain’s brother) abbr. A design language for creating the logic to be implemented in a simple programmable logic device. Short for Advanced Boolean Expression Language. Programs created with ABEL are compiled into the binary pattern necessary to create the PLD with a device programmer.

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15
Q

active low

A

adj. Denotes a logic device or circuit where a logic 1 is a lower voltage than a logic 0.

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16
Q

address bus

A

n. A set of wires connected to a processor and all of the peripherals with which it communicates, for the purpose of selecting a specific memory location or register within a particular peripheral. If the address bus contains n electrical lines, the processor can address up to 2n unique locations. Address decoding logic between the processor and the devices connected to the bus select the proper device, typically based on the uppermost bits.

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17
Q

aliasing (memory)

A
  1. n. Allowing one memory location or register to be accessible at more than one address. Aliasing is a result of address decoding and often happens with peripheral control and status registers. For example, if an I/O device has just four byte-wide registers but is mapped into a 256-byte region of memory, aliasing will occur. In this case, the same four registers can be read or written at any of 64 different locations within that region.
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18
Q

aliasing (effect)

A
  1. n. An effect, because of undersampling, where a time-varying signal appears to be running, at a much lower frequency than it really is. Aliasing is a common effect of using a digital oscilloscope to view fast waveforms, like clocks. If the scope’s sampling rate is low, the perfect 20-MHz clock could appear to be oscillating at 10 kHz.
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19
Q

aliasing (memory location)

A
  1. n. Different variables reference the same physical memory location. In languages that support pointers, it is common for a program to maintain multiple references to the same storage. Each of these references is an alias. Aliasing can create problems when optimizing compilers and pipelined processors because it becomes more difficult for them to identify and analyze data dependencies within the program.
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20
Q

analog

A

adj. Describes data represented by a continuous range of values. The opposite of digital, in which all information is quantized. Analog is the way the world beyond the quantum level works. Part of the challenge of digital engineering is to convert noisy, inaccurate, and ugly real-world data to the pristine purity of 1s and 0s. The last two decades have seen a massive growth in digital signal processors, partly because they allow us to replace analog circuits with digital. Ultimately, the goal is to push the digital components all the way back to all systems’ front ends–essentially connecting a radio’s antenna, for example, directly into a DSP input.

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21
Q

anode

A

n. The element of a semiconductor device that accepts electrons. In a diode, for example, current passes from the anode to the cathode. On a diode, the anode is the terminal not marked by a band.

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22
Q

aperiodic

A

adj. Lacking periodicity; random. The term is most often used in the embedded context when scheduling periodictasks via RMA. The issue of what to do about aperiodic tasks and interrupts inevitably arises in real-world systems. Aperiodic tasks become ready to run on the occurrence of unpredictable events.

EXAMPLE: The arrival of interrupts is often aperiodic.

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23
Q

aperiodic server

A

n. A task that responds to events of an application software

n. Software that is specific to a particular embedded system. Such application-specific code is generally built on a layered architecture of reusable components, such as a real-time operating system and network protocol stack or other middleware. If there is no such architecture, then this term may not be used. The application software is unlikely to be reusable across embedded platforms, simply because each embedded system has a different application.

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24
Q

application-specific integrated circuit (ASIC)

A

n. A piece of custom-designed hardware in a mass-produced chip. Abbreviated ASIC.

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25
Q

Ariane 5

A

n. An infamous European rocket (made by Aerospatiale) that demonstrates the flawed principle of redundancy based on duplicated software. Unlike hardware subsystems, which either work or fail and can be made more reliable through duplication, software is either right or wrong in its logic. If software fails once, it will fail again given the same inputs; merely duplicating the code does not add redundancy.

In the case of Ariane 5, some code borrowed form the successful Ariane 4 design experienced an overflow during flight. Recognizing the overflow, the primary controller shut itself down and the secondary controller took over. Unfortunately the secondary controller experienced the very same overflow condition and shut down as well. The rocket self-destructed in midair, taking some very expensive cargo with it.

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26
Q

ARM

A

(like your arm) abbr. A 32-bit RISC processor widely used in low-power embedded applications. Short for Advanced RISC Machine.

HISTORY: The ARM design was started in 1983 as a project at Acorn Computer Group (link is external). After being refused access to the upcoming Intel 80286 for newer generations of their computer line, they responded by starting up a team to design and build a new CPU. When launched in 1985, the chip was the first commercial RISC processor.

DEC later licensed the design and produced the StrongARM. This work was later passed to Intel as part of a patent-related settlement, and Intel took the opportunity to replace their ailing i860 and i960 designs with the StrongARM. Today these are known by the name XScale

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27
Q

ARM Thumb

A

n. A 16-bit variant of the 32-bit ARM instruction set. ARM processors that support the Thumb instruction set can be switched in and out of “Thumb mode” via a bit in a register. Once in the Thumb mode, the CPU fetches special 16-bit instructions from memory. The advantage of these instructions is that they can be fetched more quickly across a narrower data bus and consume less memory. Not all of the ARM’s capabilities are supported in Thumb mode, however.

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28
Q

ARP

A

(rhymes with harp) abbr. A mechanism for mapping a destination IP address to its corresponding MAC address so that an IP packet can be routed over a specific physical network such as Ethernet. Short for Address Resolution Protocol. RFC 826.

Each node on a network has both a logical (IP) address and a physical (MAC) address. When sending a packet to a specific node, the application software provides only the IP address. The protocol stack, via ARP, must determine the specific MAC address for that IP address before it can finalize and send the network frame that will contain the IP packet. In practice, it is inefficient to make ARP requests and receive replies before each packet is sent, so a table is kept (typically at the network driver) of all the known IP-MAC address pairs. Only if the MAC address of a particular destination IP address cannot be found in that table is the ARP protocol invoked. The results are added to the table then so they can be used later.

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29
Q

assembler

A

n. A software development tool that translates human-readable assembly language programs into machine-readable code that the target processor can understand and execute.

USAGE: Assembler also can mean assembly language, as in, “I wrote that part of the code in assembler.”

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30
Q

assembly language

A

n. A human-writable form of a processor’s native instruction set. In its typical form, each line of assembly code represents a single CPU instruction. The human-readable representation of each opcode is called a mnemonic.

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31
Q

asynchronous communications

A

n. A communications scheme that transmits data over a single wire, sending bits one at a time in sequence. The timing of each bit is known by both transmitter and receiver. Each transmitted data byte begins with a start bit that starts the receiver’s timing circuitry. Critical to the success of asynchronous communications is that the data bits have well-defined widths.

EXAMPLE: The best known asynchronous communications scheme is RS-232.

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32
Q

atomic

A
  1. adj. An operation that cannot be interrupted is considered atomic. Atomic operations are inherently reentrant; they complete without fear of preemption or corruption by other tasks. A single opcode that does a read-modify-write, for instance, modifies a shared variable without the risk of an intervening interrupt causing the variable to be used in a half-changed state. Software developers can turn non-natomic operations into atomic ones by disabling interrupts. See also swap, test-and set.
  2. adj. Used to indicate measurements scales. Atomic scales are on the order of angstroms
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33
Q

ATVEF

A

(at vef) abbr. A standard for creating enhanced, interactive television content and for delivering that content to a range of television, set-top, and PC-based receivers. Short for Advanced TV Enhancement Forum. ATVEF defines the standards used to create enhanced content that can be delivered over a variety of media, including analog (NTSC) and digital (ATSC) television broadcasts, and a variety of networks, including terrestrial broadcasts, cable, and satellite. It is based on HTML.

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34
Q

average-case execution time

A

n. The average amount of time to execute a section of code. It may be helpful to define the jitter and standard deviation along the average-case execution time might be interesting in some applications, the worst-case execution time is typically of far more interest, particularly in real-time systems.

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35
Q

BASIC Stamp

A

N. A tiny single-board computer manufactured by Parallax based on an 8051, PIC, or other microcontroller. The BASIC Stamp is about the size of a postage stamp (hence the name) and executes a variant of BASIC called PBASIC. Inexpensive, self-contained, and easy to program, they’re used in education and simple embedded systems that require little horsepower but rapid delivery.

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36
Q

bidirectional

A

adj. Describes a type of device or bus that supports two-way data transfers. To reduce wiring, connectors, and pin counts, it’s common to share data on one bus. Data can move from device A to B or from B to A, though not at the same time.

EXAMPLE: A bidirectional data bus is present on pretty much every microprocessor. A single bus transfers data to and from memory and I/O. Control signals police the transfers, ensuring that there are no attempts to transfer data in both directions at the same time.

Contrast with unidirectional.

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37
Q

big-endian

A

adj. A data representation for a multibyte value that has the most significant byte stored at the lowest memory address. Note that only the bytes are reordered, never the nibbles or bits that comprise them. Every processor stores its data in either big-endian or little-endian format. Sun’s SPARC, Motorola’s 68k, and the PowerPC families are all big-endian. The Java virtual machine is big-endian as well. Similarly, every communications protocol must define the byte order of its multibyte values. TCP/IP uses big-endian representation.

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38
Q

binary semaphore

A

n. A type of semaphore with just two states. Often used to guarantee mutual exclusion.

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39
Q

board support package (BSP)

A

n. Part of a software package that is processor or platform dependent. Abbreviated BSP. Typically, sample source code for the BSP is provided by the package developer. To port the larger package, only the code in the board support package must be modified. Most commercial real-time operating systems have a BSP to make porting easy.

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40
Q

bond-out processor

A

n. A special version of a processor that has some of the internal signals brought out to external pins. Bond-out processors are designed to be used within an in-circuit emulator and are not typically used in any other kind of system.

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41
Q

breakpoint

A

n. A location in a program at which execution is to be stopped and control of the processor switched to the debugger. Mechanisms for creating and removing breakpoints are provided by most debugging tools.

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42
Q

Busicom

A

N. A Japanese company that, in 1971, used Intel’s new single-chip 4004 processor to create what were arguably the world’s first embedded systems: a family of 12 business calculators.

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43
Q

busy wait

A

v. To waste precious CPU cycles polling.

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44
Q

C99

A

N. A 1999 update to the international standard for the C programming language. The updated standard is formally known as ISO/IEC 9899: Programming Languages—C. From an embedded systems programming perspective, one of C99’s most exciting enhancements is built-in definition of signed and unsigned integer data types of 8, 16, and 32 bits. (They are typedef’d as uint8_t, int8_t, uint16_t, etc. in the platform-specific library header file stdint.h.) The C99 standard also recognizes C++-style comments (//) and makes several other long-overdue language improvements.

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45
Q

central processing unit

A

n. The part of a processor that executes instructions.

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46
Q

checksum

A

n. A numerical check value calculated from a larger set of data. A checksum is most often used when sending a packet of data over a network or other communications channel. One checksum formula is a simple addition, with overflow ignored, wherein the bytes of the packet are added together into a variable of a fixed size/width (say, 16 bits) as they are sent. The checksum is typically sent at the end of the packet and used at the receiving end to confirm the integrity of the preceding data.

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47
Q

compiler

A

n. A software-development tool that translates high-level language programs into the machine-language instructions that a particular processor can understand and execute. However, the object code that results is not yet ready to be run; at least a linker or link-step must follow.

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48
Q

complex instruction set computer (CISC)

A

n. Describes the architecture of a processor family. Abbreviated CISC. So-called CISC processors generally feature variable-length instructions and multiple addressing formats and have a small number of general-purpose registers. Intel’s 80x86 family is the quintessential example of CISC.

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49
Q

complex programmable logic device

A

n. A larger, more capable PLD. Abbreviated CPLD. Each CPLD typically consists of several programmable logic blocks plus a matrix of programmable interconnecting paths. CPLDs can be used to create larger and more advanced logic circuits than PLDs but are generally smaller and less flexible than FPGAs. A CPLD is typically a single-chip collection of PLDs plus a switch matrix.

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50
Q

context

A

n. The current state of the processor’s registers and flags. The context must be saved when an interrupt occurs or when an operating system selects a new task to run and preempts the previously running task.

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51
Q

context switch

A

n. The process of switching from one task to another in a multitasking operating system. A context switch involves saving the context of the running task and restoring the previously saved context of the other. The piece of code that does this is necessarily processor specific.

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52
Q

copyright

A

n. A type of intellectual property protection for software that protects the unique structure, sequence, and organization of the product, in source code and/or binary form.

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53
Q

copyright infringement

A

n. When a product copies an expression of structure, sequence, and organization (SSO) protected by a copyright, the product is said to “infringe” the copyright.

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54
Q

counter/timer

A

n. A common peripheral that counts either external events (counter mode) or processor cycles (timer mode). Virtually every microcontroller has one or more on-board counter/timers. Most operate in a vast number of modes; some have dozens of control registers (Motorola’s TPU has more than 50).

Counter/timer hardware has more uses than can be imagined, including as input devices to count events, as outputs to drive pulse-width modulation devices, and as internal units to create regular interrupts for RTOS context switching.

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55
Q

counting semaphore

A

n. A type of semaphore with more than two states. A counting semaphore is typically used to track multiple resources of the same type. An attempt to take a counting semaphore is blocked only if all of the available resources are in use.

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56
Q

critical section

A

n. A sequence of instructions that must be executed in sequence and without interruption to guarantee correct operation of the software. If the instructions are interrupted, a race condition might occur.

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57
Q

cross-compiler

A

n. A compiler that runs on a different platform from the one for which it produces object code. Often even the processor architecture/family of the host and target platforms differ.

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58
Q

cybersecurity

A

n. Also known as computer security, the field of cybersecurity concerns protection of critical and or personal information through the use of cryptographic protocols and data encryption.

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59
Q

D/A converter

A

(dee to ay converter) n. A hardware device that takes a set of bits, typically from a processor, as input and produces an analog signal proportional to the digital input as output. Short for digital-to-analog converter. Abbreviated DAC. D/A converters might be as simple as an array of resistors configured in the typical “R-2R” fashion or a hybrid module that generates very precise results with many bits of resolution. A simple use is to vary the intensity of a lamp (another approach that avoids the messy analog world is a pulse-width modulator that uses different switching rates and pulse lengths to control intensity).

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60
Q

data bus

A

n. A set of electrical signals connected to the processor and all of the memory and peripheral devices with which it communicates for the purpose of transferring data between them. When the processor wants to read (write) the contents of a memory location or register within a particular peripheral, it sets the address bus pins appropriately and receives (transmits) the contents on the data bus. One unit of data is transferred in each memory cycle.

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61
Q

deadline

A

n. In a real-time system, the time at which a particular set of computations or data transfers must be completed. There are typically consequences associated with missing a deadline. If the deadline absolutely, positively must be met every time or else, it is called a hard deadline. Hard deadlines have dire consequences when missed. Other deadlines are said to be soft deadlines.

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62
Q

deadlock

A

n. An unwanted software situation in which an entire set of tasks is blocked, waiting for an event that only a task within the same set can cause. If a deadlock occurs, the only solution is to reset the involved set of tasks or the entire system. However, it is usually possible to prevent deadlocks altogether by following certain software-design practices. Consult an operating systems textbook for details. A key condition for deadlock is a circular wait.

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63
Q

debug monitor

A

n. A piece of embedded software that has been designed specifically for use as a debugging tool. It usually resides in ROM and communicates with a debugger via a serial port or network connection. The debug monitor provides a set of primitive commands to view and modify memory locations and registers, create and remove breakpoints, and execute your program. A remote debugger with knowledge of the command format communicates with the debug monitor and combines these primitives to fulfill higher-level requests like program download and single-step.

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64
Q

debugger

A

n. A tool used to test and debug software. A typical remote debugger runs on a host computer and connects to the target through a serial port or over a network. Using the debugger, you can download software to the target for immediate execution. You can also set breakpoints in the code and examine the contents of specific memory locations and registers.

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65
Q

device driver

A

n. A software module that hides the details of a particular peripheral and provides a high-level programming interface to it. Each device driver is typically a piece of operating system-specific software that makes it possible for application software to attach to, read and write data from, and change the behavior of the peripheral device. The more complex the operating system environment, the more likely it is that the device driver code will have to conform to a certain high-level API. For example, Windows and Unix both require every network device driver to conform to a common API.

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66
Q

device programmer

A

n. A tool for programming EPROMs, PLDs, nonvolatile memories, and other electrically programmable devices. Typically, the programmable device is inserted into a socket on the device programmer, and the contents of a memory buffer are then transferred into it. So-called gang programmers create several devices from the same image simultaneously.

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67
Q

digital filter

A

n. A filter that’s implemented digitally. A digital filter accepts digital inputs (typically samples read from an A/D converter) and produces digital outputs. The data is processed in firmware running on a digital signal processor.

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68
Q

digital signal processor (DSP)

A

n. A device that is similar to a microprocessor, except that the internal CPU has been optimized for use in applications involving discrete-time signal processing. Abbreviated DSP. In addition to standard microprocessor instructions, DSPs usually support a set of specialized instructions, like multiply-and-accumulate, to perform common signal-processing computations quickly. A Harvard architecture, featuring separate code and data memory spaces, is commonly used to speed data throughput. Common DSP families include Texas Instruments’ 320Cxx and Motorola’s 5600x series.

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69
Q

digital signal processing

A

n. Whether involving a DSP or not, the work of digital signal processing experts is to communicate and compress audio and video data.

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70
Q

direct memory access

A

n. A technique for transferring data directly between two peripherals (or memory and an I/O device) with only minimal intervention by the processor. Abbreviated DMA. DMA transfers are managed by a third device called a DMA controller, which shares the memory bus with the processor. Unused memory cycles are stolen by the DMA controller. The processor is only involved, via an interrupt, once the entire block of data has been transferred. In that way, the processor is freed to do other things and overall throughput is increased.

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71
Q

down counter

A

n. A counter that counts down, from its maximum value toward zero.

Contrast with up counter.

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72
Q

DRAM

A

(dee ram) abbr. A type of RAM that maintains its content only as long as the data stored in the device is refreshed at regular intervals. Short for Dynamic Random Access Memory. The repetitive row by column refresh access cycles are usually performed by a peripheral called a DRAM controller. If this isn’t done every few milliseconds, some or all of the data stored in the memory can be lost. DRAM is much cheaper per byte than SRAM because it requires just one transistor per bit rather than four to six; however, it has longer access times. DRAM’s lower cost per byte makes it attractive whenever large amounts of RAM are required. Many systems include both types: a small block of SRAM (a few kibibytes) along a critical data path and a much larger block of DRAM (mebibytes perhaps) for everything else.

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73
Q

EEPROM

A

(double-ee prom) abbr. A type of ROM that can be erased electronically and reprogrammed in-circuit (or with a device programmer). Short for Electrically Erasable Programmable Read Only Memory. From the programmer’s perspective, EEPROM is very similar to flash memory. The biggest difference is that the bytes (words) of an EEPROM can be erased individually.

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74
Q

electromagnetic spectrum

A

n. The entire range of possible frequencies, from DC to gamma rays and beyond. The spectrum is measured in terms of wavelength or frequency, where wavelength in meters = 3 × 108/frequency in hertz. AM radio is at the low end of the spectrum, from 500 kHz to 1.6 MHz; FM radio is around 100 MHz, cell phones at 800 MHz, radar from 2 to 14 GHz, and visible light around 106 GHz.

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75
Q

embedded C++

A

n. A subset of the C++ programming language that is optimized for embedded systems use and supported by some compiler vendors. Abbreviated EC++.

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76
Q

embedded system

A

n. A combination of computer hardware and software, and perhaps additional mechanical or other parts, designed to perform a dedicated function. In some cases, embedded systems are part of a larger system or product, as in the case of an antilock braking system in a car.

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77
Q

emulator

A

n. Any debugging tool that pretends to be a system resource and adds additional functionality or remote visibility.

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78
Q

endianness

A

n. The attribute of a hardware or software architecture that indicates how multibyte values are represented and stored. The two possibilities are called big-endian and little-endian.

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79
Q

EPROM

A

(ee-prom) abbr. A type of ROM that can be erased by exposing it to ultraviolet light. Once erased, an EPROM can be reprogrammed with a device programmer. Short for Erasable Programmable Read Only Memory. A window in the device allows ultraviolet radiation to enter the device and reset the ROM circuitry to its initial state.

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80
Q

executable

A

n. A file containing object code that is ready for execution on the target. All that remains is to place the object code into a ROM or download it via a debugging tool.

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81
Q

expert witness

A

n. An expert witness is a person, such as a professor, who writes an expert report and testifies in court cases based on his expertise in a particular field. Types of litigation requiring testifying software experts include patent infringement and invalidity, product liability, and software copyright and trade secrets theft.

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82
Q

field-programmable gate array (FPGA)

A

n. A logic chip that has thousands of internal gates and can be programmed. Abbreviated FPGA. FPGAs are especially popular for prototyping integrated circuit designs. However, once the design is finalized, hard-wired chips called ASICs are often used instead for their faster performance and lower cost.

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83
Q

firmware

A

n. Executable software that is stored within a ROM.

USAGE: This term is interchangeable with embedded software and sometimes is used even when the executable is not stored in ROM.

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84
Q

flash

A

v. To download new firmware into a flash memory. A bootloader typically facilitates this process by communicating with a program on the host, erasing the flash memory, and writing the new code. The sector of the flash memory that contains the bootloader’s code must not be overwritten in the process.

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85
Q

flash memory

A

n. A RAM-ROM hybrid that can be erased and rewritten under software control. Abbreviated flash. Flash is an in-circuit programmable nonvolatile memory segmented into blocks called sectors. Each sector can be individually erased, then the data within it rewritten. Flash memory is common in systems that require nonvolatile data storage at very low cost. In some cases, a large flash device can be used instead of a disk drive. Although there is a theoretical limit to the number of times a flash memory can be erased and rewritten successfully, this limit is seldom reached in practice.

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86
Q

Forth

A

N. A niche programming language originally designed for real-time control of telescopes. An ANSI standard since 1994 (X3.215). Forth has a simple syntax and many keywords, unlike C/C++ and similar languages, which are the opposite. Forth programs are made up of many small procedures, and math is via RPN. These procedures are compiled, though Forth has no compiler in the traditional sense. Forth is essentially just a collection of procedures, called words, and an interpreter.

Nowadays, Forth is used primarily to test and debug hardware and bring up systems. Only about 2% of the subscribers of Embedded Systems Programming reported using Forth regularly in a 2001 survey.

Interestingly, some Unix workstations boot a small Forth interpreter before the rest of the operating system. One such environment is Sun’s Open Boot, which provides Forth programming capabilities right out of ROM and a small bootloader that enables the operating system to be manually or automatically loaded and run from a disk drive or over a network. IEEE 1275 defines a standard based on Open Boot.

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87
Q

freeware

A

n. Shareware that is distributed without payment expectation.

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88
Q

free software

A

n. Software that is distributed free of charge along with or as source code, so that users can modify the software as they wish.

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89
Q

fuzzy logic

A

n. A methodology that makes it possible to make decisions based only on ambiguous or imprecise input data. Fuzzy logic can be implemented in software or hardware. As a first step, the possible inputs are grouped into sets. Decisions are then made based on the partial membership of inputs in these sets (according to fuzzy set theory), rather than the specific values of the input signals. The overlap of these partial set memberships results is a specific decision.

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90
Q

geartooth Hall effect sensor

A

n. A Hall effect sensor and a magnet packaged together for easy use in detecting the rotation of a gear. As each geartooth passes by the sensor, a pulse is output. A counter can be connected to count these pulses and software can then determine the speed of the gear’s rotation.

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91
Q

general-purpose computer

A

n. A combination of computer hardware and software that serves as a general-purpose computing platform. PCs, Macs, and Unix workstations are the most popular modern examples. Contrast with embedded system. See also basic input/output system.

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92
Q

general-purpose I/O (GPIO)

A

n. Customizable input/output pins on a microcontroller. Abbreviated GPIO. By wiring the hardware appropriately and configuring the GPIO port in software, one pin can be used as input to read a switch, another as an output to control a status LED, and a pair to serve as clock and data for a serial EEPROM.

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93
Q

glitch

A

n. An unwanted, spurious logic pulse of very short duration. Any unwanted, erratic, and generally nonreproducible behavior of a system is termed a glitch. Most result from poor timing or bad combinatorial design.

A glitch is also the standard excuse for a single irreproducible failure. Experienced developers know that the phrase, “It must’ve just been a glitch,” really means, “I have no idea what just happened, but maybe if I ignore it, the problem will go away.” Unfortunately, it seldom does.

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94
Q

glue logic

A

n. The address decoding and other messy circuitry (or programmable logic) that ties together a system. It’s called glue logic because it’s what holds the entire system together.

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95
Q

GNU General Public License (GPL)

A

n. A specific set of copyright terms associated with free software from the GNU Project and other organizations.

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96
Q

GNU tools

A

n. A broad generic name for the popular GNU compiler (gcc), debugger (gdb), binutils, and related software development tools.

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97
Q

Gray code

A

N. Any of several possible mappings of the integers from 0 to 2n-1 to a set of n-bit binary values such that only 1 bit differs between each successive binary value. The mapping that’s typically used is formally known as binary reflected Gray code. Generating a set of that form involves starting with 0…000b and always flipping the rightmost bit that will give a new value.

Applications abound. Consider a shaft encoder with a 4-bit parallel output. Encoders use brushes or optical techniques to report position; these are mechanical and, therefore, imperfect implementations. An encoder that outputs normal binary, if positioned between 3 (0011b) and 4 (0100b), might dither with 3 bits changing. The processor might read (serially) 0011b (3), 0100b (4), or 0111b (7)—the latter a hugely incorrect value. If a Gray code is used, the data will dither between 0010b (3) and 0110b (4); the only possible values seen by the computer are those two, both of which are off by one from each other, and either of which is a reasonable approximation of the position.

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98
Q

heap

A

n. An area of memory used for dynamic memory allocation. Calls to malloc() and free() and the C++ operators new and delete result in run-time manipulation of the heap. In Java, there is a heap and a new keyword, but no way to manually free the space. A garbage collector does that automatically.

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99
Q

high-level language

A

n. A language, such as C, C++, Ada, or Java, that is processor independent. Abbreviated HLL. When programming in a high-level language, it is possible to concentrate on algorithms and applications without worrying about the details of a particular processor.

HISTORY: The first high-level language (Fortran), when invented in the 1950s, was criticized as generating slow and bloated machine code. Despite a half century of progress in language and compiler design since then, many still wage code bloat versus programmer efficiency flame wars.

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100
Q

host

A

n. A general-purpose computer that communicates with the target via a serial port or network connection.

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101
Q

Hungarian notation

A

n. A variable naming convention that encodes a variable’s type as a prefix to its name. For example, an integer might be named iVariableName, with the leading i denoting the variable’s type. Hungarian notation is promoted as a readability aid, which helps the programmer avoid the headache of digging through typedefs and include files to determine a variable’s type.

Hungarian notation is essentially a commenting technique. Comments often lie, though, when they become outdated—a huge source of problems with the notation. Change the type of a variable (say, when porting the code from a 16- to a 32-bit processor), and you have to search out and change the name of every use of that variable. That rarely happens, of course, as in wParam in Microsoft’s Win32 APIs: the type changed from a 16-bit value (w stands for word) to a 32-bit value (which should have been dwParam).

In practice, the prefix idea is extremely valuable for marking three common variable types in C programs: globals, pointers, and booleans. These three types are also unlikely to change as the program evolves.

Global variables are dangerous, particularly when they are used in multitasking systems. So marking them with a preceding g, though not truly Hungarian in its style, is helpful for identifying possible critical sections.

By preceding a pointer variable with p, dereferencing the right number of times becomes easy. Whereas pFoo refers to the pointer, *pFoo and pFoo-> clearly refer to the actual object. Likewise, if you have a pointer to a pointer, label it with a pp.

Boolean variables labeled with a preceding b are easy to spot in a code listing and make their use in tests easy to get right. You would never write x = bReady + 1;, for example. Although if (!bReady) { … } makes perfect sense.

102
Q

I/O

A

(as letters) 1. abbr. Short for input/output.

  1. n. The interface between a processor and the world around it. The simplest examples are switches (inputs) and LEDs (outputs).
103
Q

I/O device

A

n. A piece of hardware that interfaces between the processor and the outside world. Common examples are switches, LEDs, serial ports, and network controllers.

USAGE: This term is generally interchangeable with peripheral.

104
Q

I/O map

A

n. A table or diagram containing the name and address range of each I/O device addressable by the processor within the I/O space.

105
Q

I/O space

A

n. A special memory region provided by some processors and generally reserved for the attachment of I/O devices. Memory locations and registers within a processor’s I/O space can only be accessed via special opcodes. For example, processors in the 80x86 family have special I/O space instructions called in and out. Contrast with memory space.

106
Q

I2C

A

(eye squared see) abbr. An inexpensive chip interconnection popular on circuit boards. Short for Inter-Integrated Circuit bus. Featuring a two-wire synchronous (data and clock) connection, I2C can run at speeds up to 100 kHz (“standard”) or 400 kHz (“high speed”) and is multidrop.

107
Q

in-circuit emulator

A

n. A debugging tool that takes the place of (emulates) the processor on the target board. Abbreviated ICE and often called an emulator for short. The ICE is a bridge between the target system and a software debugger running on the host. It provides the resources needed to access the target microprocessor. An emulator connects to or completely replaces the target CPU via a large cable, which routes all signals to the ICE unit. In-circuit emulators frequently incorporate a special bond-out version of the target processor that brings normally buried signals out of the chip to the ICE’s logic circuits.

108
Q

instruction pointer

A

n. A register in a processor that contains the address of the next instruction to be executed.

109
Q

Internet of Things (IoT)

A

N. Including mobile devices to vehicles, home appliances and other products that connect, communicate, and exchange data over the Internet.

110
Q

interrupt

A

n. An asynchronous electrical signal from a peripheral to the processor. When the peripheral asserts this signal, an interrupt is said to occur. When an interrupt occurs, the current context is saved and an interrupt service routine is executed. When the interrupt service routine exits, control of the processor is returned to whatever part of the software was previously running.

111
Q

interrupt latency

A

n. The amount of time between the assertion of an interrupt signal and the start of the associated interrupt service routine. Factors that affect interrupt latency include the length of time that interrupts are disabled during normal program execution, processor speed, and preemption of the processor by higher priority interrupts.

112
Q

interrupt service routine (ISR)

A

n. A small piece of software executed in response to a particular interrupt. The term interrupt handler is equivalent.

113
Q

interrupt type

A

n. A unique number associated with each interrupt. The interrupt type is typically the processor’s index into the interrupt vector table.

114
Q

interrupt vector

A

n. The address of an interrupt service routine.

USAGE: This term is sometimes used incorrectly to refer to either the interrupt type or the address of the interrupt vector.

115
Q

interrupt vector table

A

n. A table containing interrupt vectors, indexed by interrupt type, that maps interrupts and interrupt service routines. The interrupt vector table must be initialized before interrupts are enabled.

116
Q

intertask communication

A

n. The passing of data between tasks in a multitasking system. Although perverse programmers can accomplish this communication with global variables, all decent RTOSes include extensive resources (mailboxes, queues, etc.) to safely transfer data without risk of race conditions.

117
Q

intertask synchronization

A

n. The coordination of timing and ordering between tasks in a multitasking environment. All decent RTOSes include resources (semaphores, monitors, etc.) to safely synchronize without the risk of race conditions.

118
Q

Java processor

A

N. A piece of silicon, or IP, capable of executing Java bytecodes natively. When the Java programming language was created, there were no such processors. Therefore, the only way to execute Java code was with a Java virtual machine. Java processors, like those from aJile, make it possible to execute Java bytecodes without a JVM. An interesting side note: compilers exist to translate programs written in other languages, like C and C++, to Java bytecodes. So a Java processor—or a Java virtual machine—can execute code written in any igh-level language.

119
Q

jitter

A

n. A dithering in time of a pulse or pulse train. Clock jitter is a tremendous problem in high-speed systems, where even 1 ns of jitter in a signal propagated all over a PCB can cause crashes.

120
Q

JTAG

A

(jay tag) abbr. A standard for providing external test access to integrated circuits serially, via a four- or five-pin external interface. Short for Joint Test Action Group, which developed the standard. The JTAG standard has been adopted as an IEEE standard (IEEE 1149 Standard Test Access Port and Boundary-Scan Architecture). JTAG ports have been widely embraced by processor manufacturers. Debug monitors and in-circuit emulators increasingly leverage the capabilities inherent in JTAG.

121
Q

jump table

A

n. An array of pointers to functions. A jump table is an efficient way to call one of several functions based on some input parameter. The input parameter is typically turned into an integer first, then used as an index into the array of function pointers. The address found there is the destination for the function call.

122
Q

jumper

A

n. A small piece of metal, usually within a plastic sheath, that is placed over a pair of pins to connect them electronically. By closing or opening this electrical circuit, the jumper acts as a switch. Embedded software can make run-time decisions based on the user’s attachment or removal of each jumper on a circuit board.

123
Q

junction transistor

A

n. A transistor made by growing P- and N-type material together on a single substrate. The junctions are the P–N interfaces. Junction transistors are thus named to differentiate them from point-contact transistors, the first type of transistor ever made. See also bipolar transistor.

124
Q

kernel

A
  1. n. A minimalist operating system.
  2. n. The core of a microkernel architecture operating system like Mach.
  3. n. An essential part of any real-time operating system, the kernel consists of the scheduler and context switch routine.
125
Q

kernel mode

A

n. A privileged CPU mode. Sometimes called supervisor mode. Parts of the operating system, such as the scheduler, device drivers, and the memory manager, usually execute in kernel mode, whereas application code executes in user mode. The transition from user mode to kernel mode is typically made somewhere inside an OS system call when a software interrupt instruction is executed.

Many of the statically linked single-memory space RTOSes used in embedded systems never place the processor into user mode. Thus, the tasks running on top of such an RTOS can execute any CPU instruction, even those, such as disable interrupts, that could bring the RTOS to its knees.

Note that some processors support multiple levels of privilege, in what are then typically called protection rings.

126
Q

kibi-

A

(kay bee) pre. The prefix meaning 2^10. Abbreviated Ki.

1 kibibit: 1 Kibit = 1,024 bits
1 kibibyte: 1 KiB = 1,024 bytes

Note the arcane use of the lower case “k” in the name “kibi,” but the use of capital “K” in the abbreviations.

See also binary prefixes, kilo-.

127
Q

linker

A

n. A software development tool that accepts one or more object files as input and outputs a relocatable program. The linker is thus run after all of the source files have been compiled and assembled into object files.

128
Q

lint

A
  1. n. A software development tool used to check C and C++ programs for error-prone syntactical constructs. The C and C++ language standards are loosely written. Plenty of run-time details, such as the actual size of an int, are left up to compiler implementers. Lint can help you find dangerous and nonportable constructs in your code before a compiler turns them into run-time bugs.
  2. n. The error-prone syntactical constructs that the lint tool finds in C and C++ programs. A program that passes through the lint tool without generating any warnings is termed “lint-free.”
129
Q

Linux

A

n. A GNU-based Unix-like open source operating system, the kernel for which was developed by Linus Torvalds

130
Q

little-endian

A

adj. A data representation for a multibyte value that has the least significant byte stored at the lowest memory address. Note that only the bytes are reordered, never the nibbles or bits that comprise them. Every processor stores its data in either big-endian or little-endian format. Intel’s 80x86 family is little-endian.

131
Q

locator

A

n. A software development tool that assigns physical addresses to a relocatable program. This is the last step in preparing software for execution by an embedded system. The resulting file is called an executable. In some cases, the locator’s functionality is built into the linker. In others, the operating system might include a loader, which performs the location step.

132
Q

logic analyzer

A

n. A hardware debugging tool that can capture and display the logic levels (0 or 1) of dozens, or even hundreds, of electrical signals as they occur. Logic analyzers can be quite helpful for debugging hardware problems and complex processor-peripheral interactions. They are primarily characterized by their capture memory depth and width and by their acquisition speed.

133
Q

MAC address

A

n. A globally unique 48-bit hardware address assigned to each device on a network. Every system on a physical network, like Ethernet or Token Ring, includes a peripheral called a network controller. This chip is the processor’s interface to the physical communications medium. As part of its initialization, the network controller must be fed a unique hardware address to use when communicating over the network. In the case of Ethernet, the hardware address is a 48-bit value. To guarantee global uniqueness, the upper 24 bits are controlled by the IEEE, which allocates them to individual device manufacturers. See OUI for more information about obtaining a block of Ethernet addresses for your company.

134
Q

mebi-

A

(meh bee) pre. The prefix meaning 2^20. Abbreviated Mi.

1 mebibit: 1 Mibit = 1,048,576 bits
1 mebibyte: 1 MiB = 1,048,576 bytes

See also binary prefixes, mega-.

135
Q

memory map

A

n. A table or diagram containing the name and address range of each peripheral and memory device within a processor’s memory space. Memory maps are a helpful aid in getting to know one’s target.

136
Q

memory-mapped I/O

A

n. A common hardware design methodology in which peripheral control and status registers are mapped into the memory space rather than the I/O space. From the software developer’s point of view, memory-mapped I/O devices look very much like memory devices. Their registers can even be accessed via ordinary pointers and data structures, greatly simplifying device driver implementation.

Contrast with ported I/O.

137
Q

memory space

A

n. A processor’s standard address space.

Contrast with I/O space.

138
Q

microcontroller

A

n. A highly integrated microprocessor designed specifically for use in embedded systems. Microcontrollers typically include an integrated CPU, memory (a small amount of RAM, ROM, or both), and other peripherals on the same chip. Common examples are Microchip’s PIC, the 8051, Intel’s 80196, and Motorola’s 68HCxx series.

139
Q

microprocessor

A

n. A piece of silicon containing a general-purpose CPU. The most common examples are Intel’s 80x86 and Motorola’s 680x0 families.

140
Q

MISRA C

A

(miz-rah see) n. A set of 127 guidelines for the use of C in safety-critical software. Although widely used in automotive systems, for example, ISO standard C is not itself properly suited to the development of safety-critical software. The MISRA C guidelines attempt to shore up weaknesses in the programming language standard so that something very like C can be used to reliably develop safe software.

MISRA C can be considered a subset of ISO C; the discarded language constructs are those deemed most prone to error. For example, rule 35 prohibits the use of assignments within Boolean expressions; thus, simple if (x = 1) typos can’t cause run-time errors that are difficult to detect and debug. If enforced by a code-checking tool as part of the build process, these rules can be complied with selectively and easily.

141
Q

monitor

A

n. A language-level intertask synchronization primitive. Java is the only language in the embedded systems space that supports monitors.

142
Q

multiply-and-accumulate (MAC)

A

adj. Describes a special CPU instruction, common on digital signal processors, that performs both a multiplication and an addition in a single instruction cycle. The result of the multiplication is typically added to a sum kept in a register. Abbreviated MAC. A multiply-and-accumulate instruction is helpful for speeding up the execution of the many digital filters and transforms required in signal processing applications. In recent years, many microprocessor and microcontroller makers have included a MAC instruction on their products as well.

143
Q

multiprocessing

A

n. The use of more than one processor in a single computer system. So-called multiprocessor systems usually have a common memory space through which all of the processors can communicate and share data. In addition, some multiprocessor systems support parallel processing.

144
Q

multitasking

A

n. The execution of multiple software routines in pseudoparallel. Each routine represents a separate thread of execution. The operating system is responsible for simulating parallelism by parceling out the processor’s time to the individual threads.

145
Q

mutex

A

(mew tex) n. An operating system data structure used by tasks to ensure exclusive access to shared variables or hardware registers. Short for mutual exclusion. A mutex is a multitasking-aware binary flag that can be used to synchronize the activities of multiple tasks. As such, it can protect critical sections from interruption and shared resources from simultaneous accesses.

146
Q

mutual exclusion

A

n. A guarantee of exclusive access to a shared resource. In embedded systems, the shared resource is typically a block of memory, a global variable, a peripheral, or a set of registers. Mutual exclusion is typically achieved with the use of a mutex.

147
Q

NAK

A

(knack) n. A response that something was not received properly. Short for Not AcKnowledged. Ironically, the mere fact that there’s a NAK implies that the packet or command was received. It could be that there was some sort of an error (possibly checksum related) or that the requested command was not supported.

148
Q

nanosecond

A

n. A billionth of a second. Abbreviated ns. A nanosecond is the length of one clock cycle at a 1 GHz rate. In that sense, it is a relatively short interval of time in which the software in a more typical MHz/kHz embedded system cannot even begin to respond to events around it.

149
Q

netlist

A

n. A computer file that lists all of the connections needed to produce a printed circuit board. The netlist is an ASCII text file that lists the characteristics of each component and what each pin of every component connects to. Each of these connections is called a node.

Netlists are produced by schematic capture programs and are sometimes used as inputs to autorouters.

150
Q

network processor

A

n. A device that is similar to a microprocessor, except that it has been optimized for use in applications involving network routing and packet processing. Abbreviated NPU. There is no standard architecture, but many network processors feature multiple RISC CPUs running in parallel. In this configuration, one central processor typically receives and handles network control packets while the others pass data packets through the system at network speeds. See also control plane, data plane.

151
Q

nibble

A

n. A 4-bit chunk of data. Any byte consists of an upper nibble and a lower nibble. This is a convenient unit of data precisely because it can represent one of 16 values. A single hexadecimal digit (0 through F) can represent the nibble in a data dump.

152
Q

nonmaskable interrupt

A

n. An interrupt that cannot be disabled. Abbreviated NMI. Known as a trap (on some Intel processors), as a level 7 interrupt (Motorola), or by other names.

153
Q

NVRAM

A

(en-vee ram) abbr. A type of RAM that retains its data even when the system is powered down. Short for Non-Volatile Random Access Memory. NVRAM frequently consists of an SRAM and a long-life battery.

154
Q

object code

A

n. A set of processor-readable opcodes and data. The output of compilers and assemblers and the input and output of a linker are files containing object code. However, there are a variety of standardized and proprietary object file formats, meaning that development tools from one vendor can only rarely read the object code produced by those of another.

155
Q

object file

A

n. A file containing object code; in particular, the output of a compiler or assembler. Most object files begin with a symbol table, which is followed by intermixed segments of code and data.

156
Q

on-chip debug

A

n. A technology-agnostic name for the variety of techniques (like BDM) that include software debug capability within the processor hardware. Sometimes abbreviated OCD. The connection to the host-based debugger is generally over a standard JTAG port or a proprietary header.

157
Q

one-time programmable (OTP)

A

adj. Describes any programmable device, like a PROM or a PLD, that can be programmed just once by the end user. Abbreviated OTP. [more]

USAGE: The term OTP is used most commonly to describe a microcontroller with an on-chip PROM.

158
Q

opcode

A

n. A binary value that is recognized by a processor as one of the instructions in its instruction set.

159
Q

open source

A

adj. A vague term describing any software that comes with source code, no matter how its use is or is not restricted.

Unfortunately, there is no clear definition for “open source software” and no standard license. Many companies are using the term open source these days, but in far different ways. Although the idea is similar to that of free software (you can generally still use, modify, and redistribute the software), there is far less emphasis on the right of the source code to be free.

Although not as true with respect to Linux, many open source companies seem to be unwilling to give up central control of their software. (Free software, on the other hand, has no owner.)

What’s important about open source software, particularly for embedded systems developers, is that its licensing terms are more like LGPL than GPL. In other words, you are typically free to add your own proprietary software to the open source code and produce a proprietary result. The free software movement doesn’t much like this but is otherwise more in alignment with the newer open source movement than in opposition to it.

160
Q

operating system

A

n. A piece of software that makes multitasking possible. An operating system typically consists of a set of system calls and a periodic clock tick ISR. The operating system is responsible for deciding which process or thread should be using the processor at any given time and for controlling access to shared resources.

161
Q

oscilloscope

A

n. A hardware debugging tool that allows you to view the voltage on one or more electrical signals. A “scope” for short. An embedded software developer might use an oscilloscope to determine whether a particular interrupt is currently asserted or to confirm the duty cycle of a PWM output.

See also analog oscilloscope, digital storage oscilloscope.

162
Q

parallel processing

A

n. The capability to apply two or more processors to a single computation.

163
Q

patent

A

n. A type of intellectual property protection for software comprising novel ideas.

164
Q

patent infringement

A

n. When a product includesthe novel ideas protected by a patent, the product is said to “infringe” the patent.

165
Q

Patriot Missile

A

n. During the Gulf War, twenty-eight U.S. soldiers were killed and almost one hundred others were wounded when a nearby Patriot missile defense system failed to properly track a Scud missile launched from Iraq. The cause of the failure was later found to be a programming error in the computer embedded in the Patriot’s weapons control system.

166
Q

peripheral

A

n. A piece of hardware other than the processor, usually an I/O device. A peripheral can reside within the same chip as the processor; in which case, it can be called an integrated or on-chip peripheral.

167
Q

physical address

A

n. The address that is placed on the address bus when accessing a memory location or register.

168
Q

PIC

A

N. A member of any of several microcontroller families from Microchip, formally termed PICmicro microcontrollers.

169
Q

PID

A

(rhymes with lid) 1. abbr. A three-part technique for designing control systems that use feedback. Short for Proportional–Integral–Derivative. The individual proportional (to the current error), integral (of all past errors), and derivative (predictor) terms work in conjunction to drive the system to its desired state quickly and with only minor overshoot.

PID controllers have been used for over a century in various mechanical, pneumatic, and electronic forms. A digital PID controller is implemented as firmware running on a processor.

170
Q

polling

A

n. A method of interfacing to a peripheral that involves repeatedly reading a status register until the device has reached the awaited state. Device drivers are either polling or interrupt-driven, with the latter being more generally preferred.

171
Q

preemptive

A

adj. An operating system is said to be preemptive if it allows the running task to be suspended when a task of higher priority becomes ready (or a task of equal priority is granted a turn). Nonpreemptive schedulers are easier to implement but less appropriate for embedded systems, which must be responsive to external events.

172
Q

priority

A

n. The relative urgency of one task or interrupt compared to another. In the case of tasks, the priority is an integer and the scheduler in a preemptive priority-based operating system compares the priorities of all that are ready to run and selects the one with the highest urgency to run.

173
Q

priority inversion

A

n. An unwanted software situation in which a high-priority task is delayed while waiting for access to a shared resource that is not even being used at the time. For all practical purposes, the priority of this task has been lowered during the delay period. Priority inversion arises when a medium-priority task preempts a lower priority task using a shared resource on which the higher priority task is pending. If the higher priority task is otherwise ready to run, but a medium-priority task is currently running instead, a priority inversion is said to occur.

Anytime you use a mutex in a preemptive operating system environment, priority inversion is a possible result. A workaround, such as priority inheritance protocol, can be used to bound the length of this inversion but not eliminate it entirely.

174
Q

process

A

n. A word that is often confused with thread. The crucial distinction is that processes have their own private virtual memory spaces. One or more threads can run in the memory space of each process.

Processes are more common in multiuser systems than in embedded systems, where the added security and reliability outweigh the overhead costs.

175
Q

processor

A

n. A generic term that does not distinguish between microprocessor, microcontroller, network processor, or digital signal processor.

176
Q

processor family

A

n. A set of related processors, usually successive generations from the same manufacturer. For example, Intel’s 80x86 family began with the 8086 and now includes the 80186, 286, 386, 486, Pentium, and many others. The later models in a family are typically backward-compatible with the ones that came before.

177
Q

processor-independent

A

adj. Said of a piece of software that is independent of the processor on which it will be run. Most programs that can be written in a high-level language are processor independent.

178
Q

processor-specific

A

adj. A piece of software that is highly dependent on the processor on which it will be run. Such code must usually be written in assembly language. Poor design can make a high-level language program very processor specific; careless assumptions about the size of longs and ints in C, for example, or explicit accesses to memory that create a particular endianness limit portability.

179
Q

profiler

A

n. A software development tool that collects and reports execution statistics for your programs. These statistics include the number of calls to each subroutine and the total amount of time spent within each. This data can be used to learn which subroutines are the most critical and, therefore, demand the greatest code efficiency. Unfortunately, such technology is not often available in the remote debugging environment typical of embedded systems development.

180
Q

programmable logic device (PLD)

A

n. An integrated circuit that can be used to implement a digital logic design in hardware. Abbreviated PLD. PLDs require far less board area, power, and wiring than several equivalent 7400-series TTL parts. And their internal structure can be reprogrammed if the logic later changes. For these reasons, inexpensive programmable logic devices like PLAs (programmable logic arrays), PALs (programmable array logic), and GALs (generic array logic) are commonly used for address decoding and other “glue” logic on circuit boards. PLDs are not as large or as flexible as FPGAs.

181
Q

PROM

A

(like the senior prom) abbr. A type of ROM that can be written (programmed) with a device programmer. Short for Programmable Read-Only Memory. These memory devices can be programmed only once, so they are sometimes referred to as write-once or one-time programmable.

182
Q

protocol stack

A

n. Any set of communication protocols, such as TCP/IP, that consists of two or more layers of software and hardware. It’s called a stack because each layer builds on the functionality in the layer below.

For example, in TCP/IP parlance, the lowest layer is called the physical layer. That’s where the rubber meets the road; or, more accurately, the bits meet the communications medium at the network interface. Above that is the data link layer, which gives each device on the network its unique address. These first two layers of the TCP/IP protocol stack are typically implemented in hardware. Once the networked devices have addresses, they can communicate. That’s where layer three, the network layer, comes in. IP is just one of the protocols that exists at this level in a TCP/IP stack; TCP and UDP are competing protocols at the transport layer.

Three more layers of software (session, presentation, and application) are defined above those, thus completing the seven-layer OSI reference model. When data is sent across the network, it generally begins at layer 4 or above, travels down through the protocol stack on the sending system, out onto the network, then back up the stack on the receiving system.

183
Q

pulse width modulation

A

n. A digital control technique wherein the processor adjusts the duty cycle of a sequence of fixed-width pulses. Abbreviated PWM. Unlike other modulation techniques, PWM is used more to control external analog signals or mechanical devices than to transmit data.

Consider driving a motor: a simple analog approach is to bias a transistor by varying amounts to control the motor’s speed. This is very inefficient because the transistor dissipates considerable amounts of heat. PWM offers an alternative: connect the same transistor to a digital output pin and control the duty cycle of a train of pulses. Now the transistor is either on or off, so there’s little power (P = I2 × R) loss.

Other applications abound. Passing the digital output through a lowpass filter converts the pulses to analog—the voltage a function of duty cycle. In effect, it’s a cheap D/A converter.

Many processors have built-in PWM controllers that generate the pulse stream for a programmable duty cycle.

184
Q

quadrature encoder

A

n. A type of rotary encoder. A mechanical device, the quadrature encoder produces two outputs 90 degrees out of phase. By counting transitions of these outputs, a computer can decode the shaft’s position and its direction of motion.

185
Q

quantum programming

A

n. Any programming involving a quantum computer. Quantum computers are devices that compute using superpositions of quantum states. Small quantum computers have recently been built, and progress is continuing. It is widely suspected that if large-scale quantum computers can be built, they will be able to solve certain kinds of problems far faster than any classical computer.n. Any programming involving a quantum computer. Quantum computers are devices that compute using superpositions of quantum states. Small quantum computers have recently been built, and progress is continuing. It is widely suspected that if large-scale quantum computers can be built, they will be able to solve certain kinds of problems far faster than any classical computer.

EXAMPLE: Quantum programming attacks problems like finding a password. The problem has these four properties.

The only way to solve it is to guess answers repeatedly and check them.
There are n possible answers to check.
Every possible answer takes the same amount of time to check.
There are no clues about which answers might be better; generating possibilities randomly is just as good as checking them in some special order.

For problems with all four properties, it will take an average of n/2 guesses to find the answer using a classical computer. The time for a quantum computer to solve this will instead be proportional to the square root of n.

186
Q

Quantum Programming

A

N. A programming paradigm that extends traditional object-oriented programming with two additional fundamental concepts: hierarchical state machines and computing based on active objects. Abbreviated QP. These two concepts complement encapsulation, inheritance, and polymorphism—the famous tripartite mantra of OOP—and are just as fundamental.

187
Q

race condition

A

n. A situation in which the combined effects of two or more programmatic threads (or a single thread and an ISR) varies depending on the precise order in which the instructions of each are executed.

Race conditions can be eliminated by surrounding critical code sections that must be executed without interruption with a pair of mutex take and release system calls. To prevent race conditions involving ISRs, interrupts must be disabled for the duration of the critical section.

EXAMPLE: If two threads both try to increment a shared global variable (x = x + 1;) and they race, the result of both threads incrementing the variable once from an initial value (x = 0;) can be either 2 (correct) or 1 (incorrect).

This race condition exists if either increment step is not executed atomically. If a context switch occurs in the middle of an increment (which is typically a sequence of three CPU instructions to read the old value into a register, increment the content of the register, then write the new value), an incorrect value can result. The error might not always occur, making tracking down such bugs incredibly difficult.

The outcome (final value of x) in this case is dependent on the precise order in which the instructions of the two threads are executed. The shared data and random nature of preemptive context switches are the culprits that cause the race condition.

188
Q

random access memory (RAM)

A

n. A broad classification of memory devices that includes all devices in which individual memory locations can be read or written in any order required by the application. Abbreviated RAM. Misused to mean memory that can be both read and written, but the term is so broadly (mis)used in this fashion that nearly everyone assumes random access is the same as read-write.

189
Q

rate monotonic analysis (RMA)

A

n. The process of analyzing a real-time system to assign individual thread priorities according to the rate monotonic algorithm.

190
Q

read-only memory (ROM)

A

n. A broad classification of memory devices that includes all devices in which memory locations cannot be modified. Abbreviated ROM. Misused to mean any nonvolatile memory, including flash and EEPROM, that can be modified in-system.

191
Q

real-time operating system (RTOS)

A

n. An operating system designed specifically for use in real-time systems. Abbreviated RTOS.

192
Q

real-time system

A

n. Any computer system, embedded or otherwise, that has timeliness requirements. The following question can be used to distinguish real-time systems from the rest: “Is a late answer as bad, or even worse, than a wrong answer?” In other words, what happens if the computation doesn’t finish in time? If nothing bad happens, it’s not a real-time system. If someone dies or the mission fails, it’s generally considered “hard” real-time, which is meant to imply that the system has hard deadlines. Everything in between is “soft” real-time.

193
Q

recursive

A

adj. Said of software that calls itself. Recursion should generally be avoided in an embedded system, since it frequently requires a large stack.

194
Q

reentrant

A

adj. Said of software that can be executed multiple times simultaneously. A reentrant function can be safely called recursively or from multiple tasks. The key to making code reentrant is to ensure mutual exclusion whenever accessing global variables or shared registers.

195
Q

register

A

n. A memory-like location that is part of a processor or an I/O device. The reference to the register is encoded as part of the instruction, not as a discrete address. A processor register is much faster to read or write than a location in memory. Generally, each bit or set of bits within a peripheral register controls or tracks some behavior of the larger device.

196
Q

relocatable

A

n. A file containing object code that is almost ready for execution on the target. The final remaining step is to use a locator or loader to fix the remaining relocatable addresses within the code. The result of that process is an executable.

197
Q

reset address

A

n. The address from which the first instruction will be fetched after a processor is powered on or reset; usually in ROM.

198
Q

reset code

A

n. A small piece of code that is placed at the reset address. The reset code is usually written in assembly language and might simply be the equivalent of “jump to the startup code.”

199
Q

resistance temperature detector

A

n. A temperature-sensitive wire, often made of copper, nickel, or platinum, that’s used to measure temperature. Abbreviated RTD. An RTD can be constructed on a ceramic part. Common RTD materials are copper, platinum, or nickel.

200
Q

reverse engineering

A

n. A process of understanding the function and design of electronics and/or software beginning with the finished product and working in the direction of the designer’s intent. The service of reverse engineering is sometimes performed by software experts with testifying experience.

201
Q

ROM emulator

A

n. A debugging tool that plugs into the target system’s ROM sockets (or that attaches to the SMT ROM parts). ROM emulators link the target system to a host computer. A plug either inserts into the target ROM sockets, clips over SMT ROM chips, or is soldered down in place of the ROM parts. The emulator then links this connection to the host computer over RS-232, Ethernet, or USB.

A ROM emulator lets the developer examine and change memory, I/O, and registers. It will support breakpoints (usually software-only), and single stepping. The biggest advantage of a ROM emulator is that it doesn’t require a dedicated target comm port, as a ROM monitor would.

202
Q

scheduler

A

n. The part of an operating system that decides which task to run next. The scheduler’s decision is based on the state of each task, the relative priorities of those that are ready to run, and the specific scheduling algorithm implemented.

203
Q

semaphore

A

n. A data structure that is used for intertask synchronization. Semaphores are usually provided by the operating system and come in two types: binary and counting. The former can be used for mutual exclusion.

204
Q

shareware

A

n. Software that is distributed for free, but with a payment expectation.

205
Q

simulator

A

n. A debugging tool that runs on the host and pretends to be the target processor. A simulator can be used to test pieces of the embedded software before the embedded hardware is available. Unfortunately, attempts to simulate interactions with complex peripherals are often more trouble than they are worth.

206
Q

software flow control

A

n. A flow control technique that uses in-band signaling. When a receiver in a bidirectional communications channel is no longer able to process or buffer incoming data, it transmits a special character request to the sender to pause the flow. When it is capable of again receiving new data, it then transmits a different character to the sender to resume the flow.

207
Q

software interrupt

A

n. An interruption of a program that is initiated by a software instruction. Software interrupts are commonly used to implement breakpoints and operating system entry points. Unlike true interrupts, they occur synchronously with respect to program execution; that is, software interrupts always occur at the beginning of an instruction execution cycle.

208
Q

source code

A

n. A program (or part of one) in its original, human-readable form. Any file containing C, C++, Java, even assembly-language code is source code. Barr Group’s software expert witness team provides source code reviews and expert reports for product liability, patent infringement, software copyright, and trade secrets theft litigation in the United States and Canada.

209
Q

SPI

A

(like spy, or as letters) abbr. An inexpensive bus for chip interconnection that is popular on circuit boards. Short for Serial Peripheral Interface.

210
Q

SRAM

A

(ess-RAM) abbr. A type of RAM that retains its contents as long as the system is powered on. Short for Static Random Access Memory. Data stored in SRAM is lost when the system is powered down or reset.

211
Q

stack

A

n. A list in which elements are always added and removed from the (conceptual) end. A last-in, first-out queue. Stacks are one of the four basic kinds of queues or lists. They are used most frequently to keep track of hierarchically nested processes. They are common in both application- and system-level software. Any processor that implements a call instruction must also support some kind of hardware stack (the run-time stack). Compilers rely on the run-time stack to support function calls and argument passing.

HISTORY: A few processors did exist without hardware stacks, though these antiques are never seen today. RCA’s 1802, the first really useful CMOS processor—used in many ultra–low-power apps in the 1970s and early 1980s—did not have a hardware stack. Instead, programmers simulated stacks with code that took a return address in a register and added it to a software-implemented stack.

212
Q

stack frame

A

n. An area of the stack associated with a particular function call.

213
Q

startup code

A

n. A piece of assembly language code that prepares the way for software written in a high_level_language. Most cross-compilers come with startup code that you can modify, compile, and link with your embedded programs. Startup code usually initializes code and data segments, safes I/O, and sets up chip selects and wait states.The world before main()

214
Q

target

A

n. The embedded system under development.

USAGE: This term is never used to describe a finished product. During development, the embedded system (for which the software is being developed) is normally called the target to distinguish it from the host system (where the software is being developed). This distinction is necessary, in part, because the host might also be capable of executing the software under development—either directly or in a simulator.

215
Q

task

A

n. The central abstraction of a real-time operating system. Each task must maintain its own copy of the CPU’s instruction pointer and general-purpose registers. Unlike processes, tasks share a common memory space and so programmers must be careful to avoid overwriting other task’s code, data, and stack.

USAGE: For most practical purposes, the terms task and thread are interchangeable. However, task is preferred when working with real-time operating systems, which generally have just one memory space, whereas thread is more commonly used on multiuser platforms such as Unix or Windows, where multiple threads of execution can run within the memory space of a single process.

216
Q

executable task

A

n. Any individual computation, set of computations, decision-making logic, or combination thereof that must be performed at run-time by software. When using an RTOS, each task to be completed may be assigned to an individual executable task. This often makes system decomposition and code maintenance easier.

217
Q

Therac-25

A

N. A radiation therapy machine, implemented as an embedded system, that suffered a series of race conditions that killed six people by overdosing between June 1985 and January 1987. The product was made by Atomic Energy of Canada Limited. The flawed software was implemented in PDP-11 assembly language, though that was not specifically the source of the problem. In essence, the race conditions resulted from a poor software design riddled with global variables representing the various modes of the system’s operation. Attempts to fix the first of the problems ended up only making matters worse.

218
Q

thermistor

A

n. A type of sensor used to measure temperature that is essentially a temperature-sensitive resistor. In conjunction with a reference voltage, an op-amp, and an analog-to-digital converter, a thermistor can be used to measure temperatures digitally.

219
Q

thermocouple

A

n. An electronic component used to sense temperature. A temperature-sensitive junction of two dissimilar materials produces a small voltage (typically 50 µV/°C).

220
Q

thread

A

n. Another name for a task. This name is more common in operating systems that support processes. A task is simply a thread in a single-process system.

221
Q

timer

A

n. A peripheral that measures elapsed time, typically by counting processor cycles or clocks. Compare to counter. See also input capture timer, counter/timer.

222
Q

tracepoint

A

n. Like a breakpoint except that, rather than stopping the program, a counter is incremented. Tracepoints are not supported by all debugging tools.

223
Q

trade secret

A

n. A type of intellectual property protection for software that provides additional protections when the source code is kept proprietary and closely guarded.

224
Q

trap

A

n. An interruption of a program that is triggered by the processor own internal hardware. For example, the processor might trap if an illegal opcode is found within the program.

225
Q

uClinux

A

(you see Linux) n. A variant of the popular Linux kernel designed for use in systems without a memory management unit. Despite the absence of an MMU, uClinux provides complete and stable support for multitasking, along with a TCP/IP stack, support for popular filesystems such as ext2, NFS, and FAT, and the familiar Linux API.

226
Q

unidirectional

A

adj. A one-way flow of information, as in some communications channels.

EXAMPLE: The address bus coming out of a processor is generally unidirectional.

227
Q

Unified Modeling Language (UML)

A

N. A standardized visual notation for communication about system specifications and design details. Abbreviated UML.

228
Q

uninitialized data

A

n. Static variables that have no initial value assigned to them. Uninitialized data is generally located in the bss segment.

229
Q

Universal Serial Bus (USB)

A

n. A serial protocol and physical link that transmits all data differentially on a single pair of wires. Abbreviated USB. USB is an increasingly popular replacement for slower serial and parallel ports, especially for connecting to general-purpose computers. In addition to higher throughput, USB also offers the ability to power downstream devices and to connect a much larger number of devices.

The USB 1.0 standard specifies two kinds of cables and two variations of connectors. High-speed cables, for 12 Mbps communication, are better shielded than their less expensive 1.5 Mbps counterparts. Each cable has an “A” connector on one end and a “B” on the other. Since the two types are physically different it’s impossible to install a cable incorrectly.

230
Q

up counter

A

n. A counter that counts up from zero toward its maximum value. [

231
Q

user mode

A

n. A state in which a processor will not execute some of its instructions. For example, while in user mode, it might not be possible to disable interrupts. Contrast with kernel mode.

232
Q

via

A

n. A copper trace that connects signals on two or more layers of a PCB.

233
Q

void

A

res. Having no defined type. In function prototypes and definitions, C’s void keyword is used to indicate the lack of a return value or parameters. In pointer creation and manipulation, it asks the compiler to forgo all possible knowledge of the type of data pointed to.

234
Q

volatile (C)

A

res. A C keyword that should be used to warn your compiler (particularly the optimizer) about any pointers that point to registers with volatile values. This will ensure that the actual value is reread each time the data is used.

235
Q

volatile (variable)

A

adj. Said of a value that can change without the intervention of software. For example, values within the registers of some I/O devices might change in response to external events. Similarly, the contents of global variables that are shared by two or more tasks or a task and an ISR can be considered volatile.

236
Q

volt

A

n. A standard unit of electromotive force. Abbreviated V. One volt is the electrical force between two points for which 1 ampere of current will do 1 joule of work.

237
Q

voltage-controlled oscillator

A

n. An oscillator with an output frequency that is a function of an input voltage. Abbreviated VCO. VCOs are very useful for transforming analog data to digital and then transmitting the signal over a single wire.

238
Q

VxWorks

A

(vee ex works) N. A commercial real-time operating system from Wind River Systems.

HISTORY: The “Vx” in VxWorks is short for VRTX. The product was originally a set of add-ons for the then-popular VRTX RTOS, rather than a direct competitor. A business dispute later caused Wind River Systems to write its own kernel and discontinue its previous practice of bundling the VRTX code and license.

239
Q

walking 1s test

A

n. A memory test that involves moving a 1 bit through a byte or word to systematically confirm each bit can hold a 1 value. All of the other bits are set to 0 during the test. See also checkerboard test. [more]

EXAMPLE: An 8-bit walking 1s test begins by writing 00000001b to the test memory location, then reading it back. If the same value was read back successfully, then 00000010b is written and confirmed via a subsequent read. Then 00000100b, 00001000b, … , and 10000000b are each tested. If all values are read back properly, then the data bus passes the test.

240
Q

watchdog timer

A

n. A fail-safe mechanism that intervenes if a system stops functioning. Abbreviated WDT. A hardware timer that is periodically reset by software. If the software crashes or hangs, the watchdog timer will expire, and the entire system will be reset automatically.

241
Q

watchpoint

A

n. Like a breakpoint, but in the data area of memory rather than the code area. Any access to this location with the specified access type (read, write, read/write) stops execution and switches control to the debugger. Hardware support is required for realization of watchpoints. Watchpoints are not supported by all debugging tools.

242
Q

well-known port numbers

A

n. TCP and UDP port numbers 0 through 1023, which are reserved for standardized protocols, such as FTP, telnet, HTTP, and others.

243
Q

Wind River Systems

A

N. The company that developed the VxWorks real-time operating system. Sometimes just Wind River or abbreviated WRS (such as online at windriver.com (link is external)). Since its acquisition of competitor Integrated Systems (developers of pSOS) in 2000, Wind River has been the dominant player in the RTOS marketplace. In a 2002 survey of Embedded Systems Programming subscribers, about 60% of those reporting they used a commercial RTOS in the past year had used one of Wind River’s products.

244
Q

Windows CE

A

N. An embeddable variant of Microsoft (link is external)’s Windows operating systems. Abbreviated WinCE. Originally lacking real-time capabilities and still quite large (8 MiB flash, minimum), WinCE has not yet taken off in the embedded space as Microsoft had hoped (and many RTOS vendors feared).

245
Q

X-Acto knife

A

(ex act toe) N. A small, razor-sharp knife with a disposable blade used (in electronics) to remove solder bridges between IC pins, clean up PCB tracks, and trim fingernails. The X-Acto knife is part of the universal troubleshooting kit needed by every developer. Other components include duct tape, 10-kΩ resistors, and Super Glue.

246
Q

Xilinx

A

(zy links) N. The world’s leading provider of programmable logic devices, with 50% of the market in 2002. Founded in 1984, Xilinx pioneered the FPGA and now also sells a line of CPLDs. Listed by Fortune Magazine in 2001 and 2002 as one of the best 100 companies to work for.

247
Q

XOFF

A

(ex off) n. A special character transmitted in-band to request a resumption of a previously paused flow of incoming data. ASCII 0x13.

248
Q

XON

A

(ex or) n. A special character transmitted in-band to request a pause in the flow of incoming data. ASCII 0x11.

Note that because the XON character is sent in the communications channel, binary data sent across the channel must be stripped of all 0x11s. This is typically done by inserting an escape code before the binary data’s 0x11 is sent so that the device on the other end will know not to interpret that next byte as an XON. See also XOFF, software flow control.

249
Q

yacc

A

(yak) N. A tool for generating C or C++ code for a parser. Short for Yet Another Compiler Compiler. Once an stream of data has been converted into tokens by a lexical scanner, such as lex, the relationship between those tokens needs to be established. The possible token orders for a language is called its grammar. Yacc is a command-line tool that accepts a grammar description (in a text file) as input and generates the code for a parser for that grammar as output. Parsers are useful in many systems other than just compilers, such as for reading the contents of a configuration file stored in a system’s flash memory.

250
Q

yield

A
  1. v. To offer use of the processor to another thread that is ready to run.
  2. n. The percentage of good die on a wafer. IC vendors test each die, with the sure knowledge that some percentage of them will not pass. Mature manufacturing processes with smaller chips give high yields; very dense parts or those made with new processes could result in yields less than 50%.
251
Q

ZIF socket

A

(like riff) n. An IC socket that is designed for ease of chip insertion and removal. Short for Zero Insertion Force.