Embedded Systems Flashcards
3 components of an embedded system:
Hardware; Application Software; Real Time Operating System (RTOS)
What is an RTOS?
The Real Time Operating System sets rules of the execution of application software.
An embedded system usually does a specific task repeatedly.
Single-Functioned
Embedded Systems have strict design metrics
Tightly Constrained
What is a design metric?
Design Metrics are used to evaluate a design. Examples are Benchmarks; cost; size; etc.
Many embedded systems have to continually do something with precise timing.
Reactive and Real Time
Embedded systems use a microprocessor (MPU) or microcontroller (MCU) as their core.
Microprocessor based
Memory
Embedded systems must have memory to store programs, usually in read-only memory (ROM).
I/O
embedded systems need peripherals for input and output.
hardware-software system
software –> features and flexibility; hardware –> performance and security
Advantages
- easily customizable
- low power consumption
- low cost
- enhanced performance
Disadvantages
- high development effort
- larger time to market
Sensor
Measures a physical quantity and turns it to an electrical signal. This is normally an analog signal.
Analog to Digital converter
Converts an analog signal to a digital signal
Processors and ASICs (custom chips)
process data and store it to memory
Digital to Analog converter
Converts a digital signal to an analog signal
Actuator
Compares an analog signal with its expected output and stores the output if it is approved
Two essential units of a processor:
- Program Flow Control Unit (CU)
- Execution Unit (EU)
Program Flow Execution Unit (CU)
includes a fetch unit –> fetches instructions from memory
Execution Unit (EU)
- includes an arithmetic and logical unit (ALU)
- includes circuits that execute instructions –> interrupt; jump; etc
Types of processors:
- General Purpose Processor (GPP)
- Application Specific Processor (ASSP)
- Application Specific Instruction Processor (ASIP)
Types of GPPs:
- Microprocessor
- Microcontroller
- Embedded Processor
- Digital Signal Processor
- Media Processor
Very Large Scale Integration (VLSI)
process of using billions of MOS transistors to make a chip
Application-Specific Integrated Circuit (ASIC)
General purpose customized chip for a particular purpose
Microprocessor
- Single VLSI chip
- has a CPU
- May have other units (Coaches; floating point processing arithmetic unit; pipelining units for optimized processing; etc)
- Usually 2GHz clock
- earlier microprocessors used a ~1MHz clock for the fetch-and-execute cycle
- Multitasking
- Components can be added externally
- Dynamic number of I/O and memory
- External memory and I/O is costly/heavier
- External devices –> more space and consume more power
microcontroller/microcomputer
- Single VLSI chip
- limited computational capabilities
- enhanced I/O capabilities
- many on-chip functional units (CPU; RAM; ROM; I/O; Timer; Serial COM port)
- Single-task
- components cannot be added externally
- Static number of I/O and memory
- Cheaper than a microprocessor
- consumes less power and less space
8051 microcontrollers
- 8-bit data bus
- external data memory up to 64K
- external program memory up to 64K
- can address up to 128K external memory
- 4K ROM
- 128 bytes RAM
- 4 register banks
- 128 user-defined software flags
- 8-bit bidirectional data bus
- 16-bit unidirectional address bus
- 3 internal interrupts
- 2 external interrupts
- 4 8-bit GPIO
- 16-bit program counter + data pointer
- may have UARTs; ADC; Op-amp; etc
Harvard Architecture
- Data and Code lie in different memory blocks
- separate storage and signal buses for instructions and data
- data storage is contained within the CPU
- instruction storage cannot be accessed as data
- separate memory areas for instructions and data
- simultaneous access to instructions and data
- memories do not need to share properties
- slower speed
- complex
- one clock cycle
Von Neumann architecture
- Data and Code lie in the same memory blocks
- Proposed by John von Neumann
- One path exists for both information and data
- Single-task –> CPU either fetches information or does read/write operations (fetch and data operations are mutually exclusive)
- supports simple hardware
- single sequential memory
- usually small cache
- higher speed
- simple
- two clock cycles
Databus
Something used to transfer data between components in a computer
Complex Instruction Set Computer (CISC)
- can address a large number of instructions
- easier to program
- simple compiler
- many addressing modes
- complex instruction format
- instruction length is variable
- Higher clock frequency
- higher emphasis on hardware
- Control unit has large instruction set via micro-program unit
- Slower execution –> instruction are read and decoded
- pipelining not possible
Reduced Instruction Set Computer (RISC)
- Use fewer instructions to save time
- Harder to program
- Complex compiler
- Few addressing formats
- Fix instruction format
- Instruction length varies
- Lower clock frequency
- Higher emphasis on software
- Each instruction is executed by hardware
- Faster execution –> instructions are executed via hardware
- pipelining possible if single clock cycle
pipelining
process of storing and prioritizing instructions
Compiler
Transforms source code (written in the source language) into a different programming language (normally binary). Most commonly to make a program executable. Compiler transition code to low level programming languages from high level programming languages.
Cross-Compiler
A compiler that compiles a program so that it can run on a different CPU
Decompiler
Converts a program from a low level programming language to a high level programming language
Language converter
Converts a program from one high-level programming language to another.
Compiler operations:
- preprocessing
- parsing
- semantic analysis
- code generation
- code optimization
Assembler
- takes instructions in assembly language and converts them into bits for the processor to use
- creates object code by turning assembly language into opcode
Object code
product of a compiler
Operation code (Opcode/Opstring)
- also called: instruction machine code/instruction code/instruction syllable/instruction parcel
- part of instruction that declares the operation that is to be done
Debugging
- get rid of bugs or make something work
Tools for debugging
- Simulators
- Microcontroller evaluation board
- Emulators
Simulators
- simulates a MCU on a (host) computer
- run code on a virtual MCU
- Defines processor and others in the family of the microcontroller
- Monitors information in source code on every step
- Gives status of RAM and simulated ports on every step
- Monitors system response and finds throughput
- Provides stack trace of output against the processor registers
- Provides explanation of a command at a step
- Monitors commands from computer keyboard
- Allows breakpoints in code and semantic conditions (normally up to 8/16/32)
- Helps with synchronizing delays and internal peripherals
throughput
Amount of information passing through a system
Microcontroller evaluation board
- consists of:
- hardware board (evaluation board)
- in-system programmer
- software tools (compiler; assembler; linker; etc)
- Maybe an IDE
- Work in real-time
- Easy I/O verification
- cheapest option for simple MCU projects
Emulators
- can be hardware and/or software
- emulates functions of guest computer onto a host computer
- shows replicated behavior of the guest computer
- helps a user to work on any application or OS on a similar platform from the original
Peripherals in embedded systems:
- Serial Communication Interfaces (SCI) –> (RS232; RS422; RS485; etc)
- Synchronous Serial Communication Interface (I2C; SPI; SSC; ESSI; etc)
- Universal Serial Bus (USB)
- Multi Media Cards (SD Cards; Compact Flash; etc)
- Networks (Ethernet; LonWorks; Zigbee; etc)
- Fieldbuses (CAN-Bus; LIN-Bus; PROFIBUS; etc)
- Timers (PLL; Capture/Compare and Time Processing Units; etc)
- IO (GPIO)
- Analog to Digital (ADC); Digital to Analog (DAC)
- Debugging interface (JTAG; ISP; ICSP; BDM; BITP; DP9)
Choosing a Microcontroller
- has to meet task at hand while being cost efficient
- 8-bit/16-bit/32-bit –> pick best one to handle computing needs
- Speed
- Packaging (space; assembling; prototyping)
- Power Consumption (important for battery-powered embedded systems)
- RAM/ROM amount
- I/O and Timer count
- Cost per Unit (contributes to final cost)
Variations of the 8051:
- 8051: RAM: 128 bytes; ROM: 4K; 2 timers; 1 serial port; 4 8-bit GPIO
- 8052: RAM: 256 bytes; ROM: 8K; 3 timers; 1 serial port; 4 8-bit GPIO
- 8031: RAM: 128 bytes; ROM: 0K (up to 64K external); 2 timers; 1 serial port; 4 8-bit GPIO (external I/O supported)
8051 GPIO
- Ports numbered 0-7 for each 8-bit GPIO
- 4 GPIO ports labeled from P0-P3
- RESET pin resets all GPIO as inputs
- After RST, 0 as input changes it to an output
- After 1 as input, output changes into an input
8051 P0
- Connected to 10K pullup resistors
- pins sometimes addressed as AD0 - AD7 –> address and data
- ALE = 1 ? A0 - A7 : D0 - D7
- connected to 10K pullup if no external memory
Pullup/Pulldown resistor
- Used to prevent a floating state for GPIO
- Pullup: Resistor is connected between VCC and the GPIO pin
- Pulldown: Resistor is connected between GND and the GPIO pin
- Pullup resistors are more common
- Strong pullup uses a low resistance
- Weak pullup uses a high resistance
- The resistor restricts the input voltage; resistance has to be goldilocks
- MCU input pins have an impedance: resistor connected to opposite terminal from GPIO
- large resistance = slower response –> unintentional RC filter
- Pullup calculation: R = (Vcc)/(current over Resistor)
8051 P1 - P3
- Pullup resistors are internal
- P2 is always used with P0 as a 16-bit address line for external memory
- P2 is sometimes designated as A0 - A7
- P3.0 = receiver (RxD); P3.1 = Transmitter (TxD) –> serial communication
- P3.2 & P3.3 –> external interrupts
- P3.4 = T0 & P3.5 = T1 –> timers
- P3.6 = Write (WR) & P3.7 = Read (RD)
- P3 has active low pins (active when 0)
- P3 is for reading and writing external ROM in the 8031
8051 P0 & P2 Dual Role
- P0 can do both address and data
- 8051 multiplexes external memory via P0
- P0 - P2 address bus is labeled as A0 - A15
- P0 is A0 - A7
- P2 is A8 - A15
- 8051 can access max of 64Kb ROM
Vcc
- Pin 40
- Provides +5V to chip
Gnd
- Pin 20
- Provides ground
XTAL1; XTAL2
- Pins 18 & 19
- External clock
- 12MHz Quartz crystal connected between 18 and 19
- Needs 2 30pF capacitors from 18 to Gnd and 19 to Gnd
Reset (RST)
- Pin 9
- Digital high (at least 2 machine cycles) = termination of all activities –> Power-On Reset
- Register memory gets lost
- Program counter = 0
Machine cycle
Minimum frequency required required for a single instruction
External Access (EA)
- Pin 31
- Input pin
- Active low pin
- 8051/52: EA connected to Vcc
- 8031: EA indicates if external ROM is available
