Definitioner Flashcards
What is stored in the Process Control Block?
Process scheduling state, structuring information, privileges, state, pid, program counter, CPU registers, information of page table.
What is PCB role?
Used and modified by OS utilties (scheduling, memory, I/O resource access). The set of PCBs defines the current state of the operating system.
What is the process control block?
Is a data structure in the operating system kernel contraining information needed to manage the scheduling of a particular process.
Where is PCB stored?
In some OS it is stored in the beginning of the kernel stack of the process. (within the OS kernel).
What is context switch?
Is the process of storing the state of a process, so that it can be restored and execution resumed from the same point later. It is essential to virtualization of CPU.
What information is stored and recieved when performing a context swithc between threads?
No TLB flush is necessary, they share same adress space.
What happens during a context switch?
The processimage (registers of the process, PC) is stored in PCB. A handle to the PCB is added to a queue of processes that are ready to run. It restored the PCB of next process scheduled to run. PC from that PCV is loaded and execution can continue.
What makes context switch costly?
TLB flushes,
Thread control blocks
No need to switch page tables (same address space).
Thread-local storage
The stack of the relevant thread.
Parallelism
Do work on multiple CPU using threading, one thread per CPU
Race condition
Arises if multiple threads of execution enter the critical section at roughly the same time; both attempt to update the shared data strucutre, Results is nondeterministic
Critical section
Code that can result in race condition. Piece of code that accesses a shared resource, usually a variable or data structure.
Mutual exclusion
Guarantees one thread at a time executing within critical section.
Atomically
As a unit, all or none.
Condition variable
To wait for a condition to become true, is an explicit queue that threads can put themself on when conditions are not met, another thread can wake that thread by signaling that condition.
Semaphore
A semaphore used as a lock is called a binary semaphore. Is a powerful and flexible primitive for writing concurrent programs. Simple and utility.
Spin-waiting
Endlessly checks the value of flag
Preemptive scheduler
One that will interupt a thread via a timer.
Yield:
A system call that moves the caller from running state to ready state (process deschedules itself)
Priority inversion:
A thread of higher priority tries to acquire an lock that is already lock, it will do it indefiently.
Two-phase lock:
Uses a spinlock, if not lock is acquired during first spin phase, a sacond phase is entered, where the caller is put to sleep, and only woken up when the lock becomes free later.
Compare-and-swap
Test whether the value at the address is equal to expeted, then update memory location with the new value, if not do nothing.
Overlap
Avoid blocking program due to slow I/O.
Advantages with threads
Threads better then processes when sharing data between eachother.
Perfect scaling
Even though more work is done, it is done i parallel, and hence the time taken to complete the task is not increased.
Sloppy counter
One local counter per CPU core and one global counter, local values are periodically transferred to the global counter. If threashold is low scalabiity is low but global value more accurate.
Big kernel lock
One big lock, not good on multi-CPU systems
True or false
Concurrent counters not scalable using locks.
Reader-Writer lock
When acquiring a read lock, reader first acquires lock and then increments the readers var to track how many readers are currently inside the data structure. The reader also acquires the write lock.
How to combat deadlock
reak the symmetry, let one of that philisopher grab the right before the left. (dijkarsta solution)
Atomicity violation
The desired serializability among multiple memory accesses is violated. (locks around shared-variable references can solve it)
Order violation
The desired order between two memory accesses is flipped. (enforce ordering using condition variables)
Encapsulation:
Hiding code, using abstraction.
Conditions for deadlock
hold-and-wait, no preemption, circular wait
Hold-and-wait:
Threads hold resources allocated to them while waiting for additional resources.
No preemption
Resources (locks) cannot be forcibly removed from threads that are holding them.
Circular wait
here existst a circular chain of threads such that each thread hold one or more resources that are being requested by next thread in chain.
Total ordering:
Strict ordering of which locks to acquire prevents circular wait.
How to prevent hold and wait
Hold and wait can be prevented by having a lock for the locks we are acquiring. It is likely to decrease concurrency becuase we are not acquiring the locks when truly needed.
Livelock:
Two threads could both be repeatedly attempting this sequence of locking, trylocking, unlocking..
How to avoid deadlocks
Avoid deadlocks by avoid the need of mutex. (By using powerful hardware instructions to build data structures which does not require expkicit locking).
Deadlock avoidance: Schedules threads to guarantee no deadlock can occur. Can reduce perfomance as time for total completion can increase.
Detect and recover: IF deadlocks are rare this strat is ok. It finds deadlock and restart.
Event-based concurrency
Wait for an event to occur, check for type, and do the small amount of work it requires (I/O req, scheduling other events)..
Event handler
The code that processes each event. Blocking when thread does systemcall. Can be solved with asynchronous I/O and signal handlers.
Signal handler
Some code in the application to handle an incomming signal.
Manual stack management:
In a thread-based program the state the program needs is on the stack of the thread.
Event-based problems
If an event-handler page faults it will block. On multiple cores when need an eventhandler on each CPU and locks over the critical sections. Hard to implement.
Memory bus (proprietary)
CPU & memory
General I/O bus
PCI, connecting Graphics card
Peripheral bus
SCSI, SATA, USB
Status register:
Can be read to see the current status of the device.