Definition of terms Flashcards
1
Q
A ____ IC
includes memory, timing
circuits, power control circuits,
and input / output
connections.
A
microcontroller
2
Q
A group of binary digits that can a occupy a memory location.
A
Word
3
Q
One of the most important characteristics of any microprocessor
is the ___ it can handle
A
word length
4
Q
defines the size of many components of the
microprocessor.
A
word length
5
Q
is a group of bits handled as a single unit
A
Byte
6
Q
performs
arithmetic operations (i.e.
addition, subtraction,
multiplication, and division).
A
Arithmetic Section
7
Q
performs logic
operations (i.e. comparing,
selecting, matching, and
merging of data).
A
Logic Section
8
Q
The inputs to an ALU are: the
data to be operated on, called
A
operands and status flags
9
Q
The ALU’s output is the result
of the performed operation as
dictated by the
A
control unit
and status outputs
10
Q
- are used to
quickly accept, store, and
transfer data and instructions
that are being used
immediately by the CPU
A
Registers
11
Q
May hold an instruction, a
storage address, or any kind
of data (such as a bit
sequence or individual
characters).
A
Registers
12
Q
Two types of register:
A
Accessible and internal
register.
13
Q
- is the most
frequently used register that
holds the initial data
(operand) and the result after
executing the operation.
A
Accumulator
14
Q
serves
as a temporary storage
location for data going to and
coming from the data bus.
A
Data register or memory
data register (MDR)
15
Q
holds the addresses and are
used by instructions that
indirectly access primary
memory.
A
Address register or memory
address register (MAR)
16
Q
is a collection of status
flag bits for a processor.
A
- Status register, flag register,
or condition code register
(CCR)
17
Q
used to store the
address of the next instruction
to be fetched for execution.
A
Program Counter (PC) also
known as Instruction Pointer
Register
18
Q
this register always holds the
address of next instruction
to be fetched.
A
Program Counter
19
Q
Controls the transfer of data
and instructions among other
units of the CPU.
A
Control Unit
20
Q
takes the data in the data
register and decodes the
operation to be performed.
A
instruction decoder
21
Q
- produces a variety of control
signals to carry out the
instruction
A
controller-sequencer
22
Q
- Stores instructions, data, and
intermediate results
A
Memory
23
Q
Also known as internal
storage unit or the primary
storage or Random Access
Memory (RAM)
A
Memory
24
Q
Also known as internal
storage unit or the primary
storage or Random Access
Memory (RAM)
A
25
DRAM
Primary Memory (volatile)
26
HDD,
SSD, external drives, etc.
(non-volatile)
Secondary Memory
27
SRAM
(volatile
Cache Memory
28
* A very high speed semiconductor memory which can speed
up the CPU.
Cache Memory
29
Acts as a buffer between the CPU and the main memory
Cache Memory
30
Used to hold those parts of data and program which are most
frequently used by the CPU. Are expensive and have limited capacity
Cache Memory
31
or primary cache, is
extremely fast but relatively
small, and is usually embedded
in the processor chip as CPU
cache. (up to 64KB)
L1 cache
32
or secondary cache,
is often more spacious but
slower than L1. (256KB – 1MB)
L2 cache
33
is specialized memory
developed to improve the
performance of L1 and L2. (2MB
– 20MB)
L3 cache
34
The microprocessor follows a ___
cycle.
fetch-decode-execute
35
During ___ phase, an
instruction is taken from the
memory then decoded by the
MPUs control unit.
fetch
36
* Once the instruction is
decoded, the MPU proceeds
to __ phase and
performs the operations
dictated by the instruction.
execute
37
refers to the method by which the instruction
addresses its operand.
Addressing mode
38
Single-word instructions that have no operand
Inherent Addressing
39
* A two-word instruction in
which the opcode is
immediately followed by the
operand.
Immediate Addressing
40
Immediate and Inherent
addressing have two
advantages: they both
require less memory and
less CPU cycle.
41
A two-word instruction in
which the opcode is followed
by the address of the
operand.
Direct Addressing
42
is useful
when an operand is a variable
operated by many
instructions.
Direct addressing
43
Load the contents of the
memory location whose
address is given by the next
byte in the accumulator
Load Accumulator, LDA
44
Add the content of the memory
location whose address is
given by the next byte to the
present content of the
accumulator. Place the sum in
the accumulator.
Add
45
Stop all operation
Halt
46
* A computer architecture where instructions are simple and
designed to get executed quickly is called
RISC, Reduced Instruction
Set Computer
47
Instructions get completed in one clock cycle because of the
optimization of the instructions and pipelining.
48
RISC makes use of __ to avoid large
interactions with memory
multiple registers
49
Uses Simple instruction set
* Larger program
* Consists of large number of registers
* Simple processor circuitry (small number of transistors)
* More RAM usage
* Fixed length instructions
* Simple addressing modes
* Usually fixed number of clock cycles for executing one
instruction
RISC
50
Designed to minimize the number of instructions per
program, ignoring the number of cycles per instruction
CISC
51
Has multiple addressing nodes within single instruction
CISC
52
Makes use of very few registers.
CISC
53
Complex instruction set
* Smaller program
* Less number of registers
* Complex processor circuitry (more number of transistors)
* Little RAM usage per instruction
* Variable length instructions
* Variety of addressing modes
* Variable number of clock cycles for each instructions
CISC
54
is a specially designed microprocessor, which
can handle its particular function many times faster than the
ordinary microprocessor (ex. Math Coprocessor)
coprocessor
55
is a specialized
microprocessor designed and optimized for digital signal
processing.
Digital Signal Processor (DSP)
56
take real-world signals like voice,
audio, video, temperature, pressure, or position that have been
digitized and then mathematically manipulate them.
Digital Signal Processors
57
The process of taking an algorithm and encoding it into a
programming language, so that it can be executed by a
computer
Programming
58
* is a vocabulary or set of
grammatical rules for instructing a computer to perform a
specific task.
programming language
59
(machine language)
1GL
60
* (Assembly Language)
2GL
61
(High-level language: C++, Java, BASIC, Pascal)
3GL
62
(Procedural language: LabVIEW, MATLAB)
4GL
63
(AI Research)
5GL
64
* is the only
language a computer can understand and is made up of a
stream binary data.
Machine language, object code or machine code
65
For easier reading, programmers write the code in
octal,
decimal or hexadecimal.
66
Assembly languages have the
same structure and set of
commands as machine
languages, but they enable a
programmer to use ____
instead of numbers.
names
67
Assembly language programs are
translated into executable
machine code using an
assembler
68
are written in a form
that is close to our human
language.
High level programming
language
69
enables a
programmer to write programs
that are independent of a
particular CPU architecture.
high-level language
70
focuses more on the programming logic
rather than the hardware components such as memory
addressing and register utilization.
high-level language
71
A high-level language program can be executed in two ways:
interpreted or compiled.
72
* takes an entire program
and converts it into machine code
which is typically stored in an
executable file before running.
compiler
73
Once a program is compiled, its
___ is not needed to run
the code.
source code
74
creates machine code
that runs on a processor with a
specific Instruction Set
Architecture (ex. x86, x64, MIPS,
ARM).
compiler
75
The interpreter translates the program
one statement at a
time.
76
For interpreted programs, the __ is needed to run
the program every time.
source code
77
is much slower to execute than the same
program that’s been completely compiled.
interpreter
78
A program written in __ is not dependent on
ISA which makes it more portable.
interpreted language
79
is the term used to describe two or more
CPUs or cores working together on the same chip.
Multi-core technology
80
designs require much less printed circuit
board (PCB) space than do multi-chip SMP designs.
Multi-core CPU
81
uses slightly less power than two
coupled single-core processors.
dual-core processor
82
allow higher performance at lower energy.
Multi-core chips
83
have a mix of core
types that often run different
operating systems and
include graphics processing
units.
Heterogeneous multicore
processors
84
* is an implementation technique where multiple
instructions are overlapped in execution.
Pipelining
85
attempts to keep every part of the processor busy
with some instruction by dividing incoming instructions into a
series of sequential steps
Pipelining
86
A CPU that implements instruction-level parallelism within a
single processor core.
Superscalar Processor
87
* combines the required electronic circuits of various
computer components onto a single, integrated chip (IC).
System on Chip (SOC)
88
Its components usually include a graphical processing unit
(GPU), a central processing unit (CPU) that may be multi-core,
system memory (RAM) and secondary storage.
System on Chip (SOC)
89
Most system-on-chips are found inside mobile devices like
smartphones and tablets.
System on Chip (SOC)
90
In microprocessor technology, the number of data that is operated upon is called
Operand
91
The part of the instructrion that tells the microprocessor what operation to perform is called the
Opcode
92
an 8-bit byte in memory can represent an
93
During the fetch phase
94
in what register is the result of an arithmetic operation normally placed
95
During the phase and execute phases of the load accumulator instruction, the information on the data bus will be
96
this concept refers to the technique of storing the instruction to be performed in the memory section along with the data that is to be operated upon
stored program
