Definition of terms Flashcards

1
Q

A ____ IC
includes memory, timing
circuits, power control circuits,
and input / output
connections.

A

microcontroller

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2
Q

A group of binary digits that can a occupy a memory location.

A

Word

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3
Q

One of the most important characteristics of any microprocessor
is the ___ it can handle

A

word length

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4
Q

defines the size of many components of the
microprocessor.

A

word length

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5
Q

is a group of bits handled as a single unit

A

Byte

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6
Q

performs
arithmetic operations (i.e.
addition, subtraction,
multiplication, and division).

A

Arithmetic Section

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7
Q

performs logic
operations (i.e. comparing,
selecting, matching, and
merging of data).

A

Logic Section

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8
Q

The inputs to an ALU are: the
data to be operated on, called

A

operands and status flags

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9
Q

The ALU’s output is the result
of the performed operation as
dictated by the

A

control unit
and status outputs

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10
Q
  • are used to
    quickly accept, store, and
    transfer data and instructions
    that are being used
    immediately by the CPU
A

Registers

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11
Q

May hold an instruction, a
storage address, or any kind
of data (such as a bit
sequence or individual
characters).

A

Registers

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12
Q

Two types of register:

A

Accessible and internal
register.

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13
Q
  • is the most
    frequently used register that
    holds the initial data
    (operand) and the result after
    executing the operation.
A

Accumulator

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14
Q

serves
as a temporary storage
location for data going to and
coming from the data bus.

A

Data register or memory
data register (MDR)

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15
Q

holds the addresses and are
used by instructions that
indirectly access primary
memory.

A

Address register or memory
address register (MAR)

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16
Q

is a collection of status
flag bits for a processor.

A
  • Status register, flag register,
    or condition code register
    (CCR)
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17
Q

used to store the
address of the next instruction
to be fetched for execution.

A

Program Counter (PC) also
known as Instruction Pointer
Register

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18
Q

this register always holds the
address of next instruction
to be fetched.

A

Program Counter

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19
Q

Controls the transfer of data
and instructions among other
units of the CPU.

A

Control Unit

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20
Q

takes the data in the data
register and decodes the
operation to be performed.

A

instruction decoder

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21
Q
  • produces a variety of control
    signals to carry out the
    instruction
A

controller-sequencer

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22
Q
  • Stores instructions, data, and
    intermediate results
A

Memory

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23
Q

Also known as internal
storage unit or the primary
storage or Random Access
Memory (RAM)

A

Memory

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24
Q

Also known as internal
storage unit or the primary
storage or Random Access
Memory (RAM)

A
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25
Q

DRAM

A

Primary Memory (volatile)

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26
Q

HDD,
SSD, external drives, etc.
(non-volatile)

A

Secondary Memory

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27
Q

SRAM
(volatile

A

Cache Memory

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28
Q
  • A very high speed semiconductor memory which can speed
    up the CPU.
A

Cache Memory

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29
Q

Acts as a buffer between the CPU and the main memory

A

Cache Memory

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30
Q

Used to hold those parts of data and program which are most
frequently used by the CPU. Are expensive and have limited capacity

A

Cache Memory

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31
Q

or primary cache, is
extremely fast but relatively
small, and is usually embedded
in the processor chip as CPU
cache. (up to 64KB)

A

L1 cache

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32
Q

or secondary cache,
is often more spacious but
slower than L1. (256KB – 1MB)

A

L2 cache

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33
Q

is specialized memory
developed to improve the
performance of L1 and L2. (2MB
– 20MB)

A

L3 cache

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34
Q

The microprocessor follows a ___
cycle.

A

fetch-decode-execute

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35
Q

During ___ phase, an
instruction is taken from the
memory then decoded by the
MPUs control unit.

A

fetch

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36
Q
  • Once the instruction is
    decoded, the MPU proceeds
    to __ phase and
    performs the operations
    dictated by the instruction.
A

execute

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37
Q

refers to the method by which the instruction
addresses its operand.

A

Addressing mode

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38
Q

Single-word instructions that have no operand

A

Inherent Addressing

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39
Q
  • A two-word instruction in
    which the opcode is
    immediately followed by the
    operand.
A

Immediate Addressing

40
Q

Immediate and Inherent
addressing have two
advantages: they both

A

require less memory and
less CPU cycle.

41
Q

A two-word instruction in
which the opcode is followed
by the address of the
operand.

A

Direct Addressing

42
Q

is useful
when an operand is a variable
operated by many
instructions.

A

Direct addressing

43
Q

Load the contents of the
memory location whose
address is given by the next
byte in the accumulator

A

Load Accumulator, LDA

44
Q

Add the content of the memory
location whose address is
given by the next byte to the
present content of the
accumulator. Place the sum in
the accumulator.

A

Add

45
Q

Stop all operation

A

Halt

46
Q
  • A computer architecture where instructions are simple and
    designed to get executed quickly is called
A

RISC, Reduced Instruction
Set Computer

47
Q

Instructions get completed in one clock cycle because of the

A

optimization of the instructions and pipelining.

48
Q

RISC makes use of __ to avoid large
interactions with memory

A

multiple registers

49
Q

Uses Simple instruction set
* Larger program
* Consists of large number of registers
* Simple processor circuitry (small number of transistors)
* More RAM usage
* Fixed length instructions
* Simple addressing modes
* Usually fixed number of clock cycles for executing one
instruction

A

RISC

50
Q

Designed to minimize the number of instructions per
program, ignoring the number of cycles per instruction

A

CISC

51
Q

Has multiple addressing nodes within single instruction

A

CISC

52
Q

Makes use of very few registers.

A

CISC

53
Q

Complex instruction set
* Smaller program
* Less number of registers
* Complex processor circuitry (more number of transistors)
* Little RAM usage per instruction
* Variable length instructions
* Variety of addressing modes
* Variable number of clock cycles for each instructions

A

CISC

54
Q

is a specially designed microprocessor, which
can handle its particular function many times faster than the
ordinary microprocessor (ex. Math Coprocessor)

A

coprocessor

55
Q

is a specialized
microprocessor designed and optimized for digital signal
processing.

A

Digital Signal Processor (DSP)

56
Q

take real-world signals like voice,
audio, video, temperature, pressure, or position that have been
digitized and then mathematically manipulate them.

A

Digital Signal Processors

57
Q

The process of taking an algorithm and encoding it into a
programming language, so that it can be executed by a
computer

A

Programming

58
Q
  • is a vocabulary or set of
    grammatical rules for instructing a computer to perform a
    specific task.
A

programming language

59
Q

(machine language)

A

1GL

60
Q
  • (Assembly Language)
A

2GL

61
Q

(High-level language: C++, Java, BASIC, Pascal)

A

3GL

62
Q

(Procedural language: LabVIEW, MATLAB)

A

4GL

63
Q

(AI Research)

A

5GL

64
Q
  • is the only
    language a computer can understand and is made up of a
    stream binary data.
A

Machine language, object code or machine code

65
Q

For easier reading, programmers write the code in

A

octal,
decimal or hexadecimal.

66
Q

Assembly languages have the
same structure and set of
commands as machine
languages, but they enable a
programmer to use ____
instead of numbers.

A

names

67
Q

Assembly language programs are
translated into executable
machine code using an

A

assembler

68
Q

are written in a form
that is close to our human
language.

A

High level programming
language

69
Q

enables a
programmer to write programs
that are independent of a
particular CPU architecture.

A

high-level language

70
Q

focuses more on the programming logic
rather than the hardware components such as memory
addressing and register utilization.

A

high-level language

71
Q

A high-level language program can be executed in two ways:

A

interpreted or compiled.

72
Q
  • takes an entire program
    and converts it into machine code
    which is typically stored in an
    executable file before running.
A

compiler

73
Q

Once a program is compiled, its
___ is not needed to run
the code.

A

source code

74
Q

creates machine code
that runs on a processor with a
specific Instruction Set
Architecture (ex. x86, x64, MIPS,
ARM).

A

compiler

75
Q

The interpreter translates the program

A

one statement at a
time.

76
Q

For interpreted programs, the __ is needed to run
the program every time.

A

source code

77
Q

is much slower to execute than the same
program that’s been completely compiled.

A

interpreter

78
Q

A program written in __ is not dependent on
ISA which makes it more portable.

A

interpreted language

79
Q

is the term used to describe two or more
CPUs or cores working together on the same chip.

A

Multi-core technology

80
Q

designs require much less printed circuit
board (PCB) space than do multi-chip SMP designs.

A

Multi-core CPU

81
Q

uses slightly less power than two
coupled single-core processors.

A

dual-core processor

82
Q

allow higher performance at lower energy.

A

Multi-core chips

83
Q

have a mix of core
types that often run different
operating systems and
include graphics processing
units.

A

Heterogeneous multicore
processors

84
Q
  • is an implementation technique where multiple
    instructions are overlapped in execution.
A

Pipelining

85
Q

attempts to keep every part of the processor busy
with some instruction by dividing incoming instructions into a
series of sequential steps

A

Pipelining

86
Q

A CPU that implements instruction-level parallelism within a
single processor core.

A

Superscalar Processor

87
Q
  • combines the required electronic circuits of various
    computer components onto a single, integrated chip (IC).
A

System on Chip (SOC)

88
Q

Its components usually include a graphical processing unit
(GPU), a central processing unit (CPU) that may be multi-core,
system memory (RAM) and secondary storage.

A

System on Chip (SOC)

89
Q

Most system-on-chips are found inside mobile devices like
smartphones and tablets.

A

System on Chip (SOC)

90
Q

In microprocessor technology, the number of data that is operated upon is called

A

Operand

91
Q

The part of the instructrion that tells the microprocessor what operation to perform is called the

A

Opcode

92
Q

an 8-bit byte in memory can represent an

A
93
Q

During the fetch phase

A
94
Q

in what register is the result of an arithmetic operation normally placed

A
95
Q

During the phase and execute phases of the load accumulator instruction, the information on the data bus will be

A
96
Q

this concept refers to the technique of storing the instruction to be performed in the memory section along with the data that is to be operated upon

A

stored program